Altera SerialLite II Protocol Instrukcja Użytkownika Strona 9
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Altera Corporation 9
Preliminary
SerialLite II
Specification
Introduction
SerialLite II is a lightweight, chip-to-chip protocol suitable for packet and
streaming data in chip-to-chip, board-to-board, and backplane
applications. This protocol offers low protocol overhead, low gate count,
and minimum data transfer latency. It provides reliable, high-speed
transfers of packets between devices over serial links. The SerialLite II
protocol defines packet encapsulation at the link layer and data encoding
at the physical layer. This protocol integrates transparently with existing
networks, without software support.
Protocol Features
■ Simplex and duplex operation
■ Symmetrical and asymmetrical operation
■ In-band control signalling
■ Supports streaming and packet-based protocols
■ Support for two user packet types: data packet and priority packet
■ Nesting (priority packet within data packet) for time-critical control
packet
■ Support for single or multiple lanes
■ Data packet size: minimum one byte; no maximum.
■ Priority packet size: minimum one byte; no maximum
■ 8B/10B Physical layer encoding
■ Synchronous or asynchronous operation
■ Lane polarity reversal
■ Lane-to-lane reordering for multi-lane operation
■ Packet integrity protection using CRC-32 or CRC-16
■ Payload and idle scrambling
■ Link management packets
■ Error detection
■ Segment retry-on-error for priority packets
■ In-band flow control for priority and data packets
■ Low protocol overhead
■ Low point-to-point transfer latency
■ Inter-frame gaps are not required
Typical Applications
■ Packet or streaming data applications
■ Chip-to-chip connectivity
■ Board-to-board connectivity
- SerialLite II Protocol 1
- Reference Manual 1
- MNL-SLITE2-1.0 2
- Table of Contents 3
- About This Manual 5
- Glossary 6
- Altera Corporation vii 7
- SerialLite II 9
- Specification 9
- Architectural 10
- Overview 10
- Physical Layer 11
- Description 12
- Signal Definitions 13
- Interface Diagrams 13
- Electrical Specifications 14
- Driver Characteristics 15
- Receiver Characteristics 15
- Symbol Encoding 16
- Notation Convention 17
- Transmission Order 18
- Altera Corporation 19 19
- SerialLite II Specification 19
- Running Disparity Rules 20
- Valid and Invalid code-groups 20
- Control Symbols 21
- Comma /COM/ 21
- Align /ALN/ 21
- Idle /IDL/ 21
- Control Sequences 22
- Ordered Sequences 25
- 28 Altera Corporation 28
- Physical Layer Description 28
- Training Sequence 29
- 30 Altera Corporation 30
- Altera Corporation 31 31
- 32 Altera Corporation 32
- Altera Corporation 33 33
- 34
- Scrambling (Optional) 35
- Data Link Layer 36
- Altera Corporation 37 37
- Link Management Packets 38
- Type BIP-8 40
- BIP-8 Coverage 40
- Parameter 40
- User Data 41
- Interruption (or under-run) 42
- SLP Link Management 43
- SPP Prioirity Payload EGP 43
- SDP Data Payload EGP 43
- Multi-Lane Alignment 44
- Data Transmission Rules 45
- Lane Alignment Examples 45
- 46 Altera Corporation 46
- Data Link Layer Description 46
- Altera Corporation 47 47
- 48 Altera Corporation 48
- Altera Corporation 49 49
- 50 Altera Corporation 50
- Altera Corporation 51 51
- Transfer Size 52
- Altera Corporation 53 53
- 54 Altera Corporation 54
- Altera Corporation 55 55
- Channel Multiplexing 56
- Data Packets 57
- Priority Packets 57
- 58 Altera Corporation 58
- Altera Corporation 59 59
- 60 Altera Corporation 60
- Flow Control (Optional) 61
- Flow control time 62
- Altera Corporation 63 63
- Retry-on-Error (Optional) 64
- Segment Identification (SID) 65
- Segment Buffers 65
- Segment Acknowledgement Timer 66
- Altera Corporation 67 67
- Error Events & 69
- Handling 69
- Catastrophic Error Events 71
- Link Error Events 71
- Data Error Events 72
- Data Error Threshold 73
- Packets Marked Bad 74
- 8b/10b Code 75
- References 83
- -GX White 84
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