Altera Cyclone V GT FPGA Development Board Instrukcja Użytkownika Pobierz pdf (Strona 35)

Chapter 2: Board Components 2–27

Components and Interfaces

September 2014 Altera Corporation Cyclone V GT FPGA Development Board

Reference Manual

ENET_LED_LINK10

— 2.5-V CMOS 10-Mb link LED

ENET_LED_LINK100

— 2.5-V CMOS 100-Mb link LED

ENET_LED_LINK1000

— 2.5-V CMOS 1000-Mb link LED

ENET_LED_RX

— 2.5-V CMOS RX data active LED

ENET_LED_RX

— 2.5-V CMOS RX data active LED

ENET_LED_TX

— 2.5-V CMOS TX data active LED

ENET_MDC

AM8 2.5-V CMOS Management bus data clock

ENET_MDIO

AG14 2.5-V CMOS Management bus data

ENET_RESETN

AN9 2.5-V CMOS Device reset

ENET_RX_CLK

AM10 2.5-V CMOS RGMII receive clock

ENET_RX_D0

AK14 2.5-V CMOS RGMII receive data bus

ENET_RX_D1

AL10 2.5-V CMOS RGMII receive data bus

ENET_RX_D2

AJ14 2.5-V CMOS RGMII receive data bus

ENET_RX_D3

AK12 2.5-V CMOS RGMII receive data bus

ENET_RX_DV

AH14 2.5-V CMOS RGMII receive data valid

ENET_TX_D0

AB14 2.5-V CMOS RGMII transmit data bus

ENET_TX_D1

AD15 2.5-V CMOS RGMII transmit data bus

ENET_TX_D2

AB15 2.5-V CMOS RGMII transmit data bus

ENET_TX_D3

AB13 2.5-V CMOS RGMII transmit data bus

ENET_TX_EN

AC14 2.5-V CMOS RGMII transmit enable

ENET_XTAL_25MHZ

— 2.5-V CMOS 25-MHz RGMII transmit clock

MDI_P0