Altera Cyclone V GX FPGA Instrukcja Użytkownika Pobierz pdf (Strona 14)

4–4 Chapter 4: Development Board Setup

Factory Default Switch Settings

Cyclone V GX FPGA Development Kit October 2012 Altera Corporation

User Guide

f For more information about the FPGA board settings, refer to the Cyclone V GX FPGA

Development Board Reference Manual.

3 PCIE_JTAG_EN

Switch 3 has the following options:

■ On (0) = Do not include the PCI Express Edge

connector in the JTAG chain.

■ Off (1) = Include the PCI Express Edge

connector in the JTAG chain.

4— — —

Table 4–3. SW5 JTAG DIP Switch Settings (Part 2 of 2)

Switch

Board

Label

Function

Default

Position

1 2 ... 9 10 11 12 13 14 15 16 17 18 19 ... 37 38

Brak uwag

Altera Cyclone V GX FPGA Instrukcja Użytkownika Strona 14