Altera FIR Compiler Instrukcja Użytkownika

101 Innovation DriveSan Jose, CA 95134www.altera.comc The FIR Compiler is scheduled for product obsolescence and discontinued support as described in

1–6 Chapter 1: About the FIR CompilerMegaCore VerificationFIR Compiler User Guide © May 2011 Altera CorporationMegaCore VerificationBefore releasing a

Chapter 1: About the FIR Compiler 1–7Performance and Resource Utilization© May 2011 Altera Corporation FIR Compiler User GuideTable 1–6 shows performa

1–8 Chapter 1: About the FIR CompilerInstallation and LicensingFIR Compiler User Guide © May 2011 Altera CorporationInstallation and LicensingThe FIR

Chapter 1: About the FIR Compiler 1–9Installation and Licensing© May 2011 Altera Corporation FIR Compiler User Guidef For more information about OpenC

1–10 Chapter 1: About the FIR CompilerInstallation and LicensingFIR Compiler User Guide © May 2011 Altera Corporation

© May 2011 Altera Corporation FIR Compiler User Guide2. Getting StartedDesign FlowsThe FIR Compiler MegaCore® function supports the following design f

2–2 Chapter 2: Getting StartedMegaWizard Plug-In Manager FlowFIR Compiler User Guide © May 2011 Altera Corporation6. Simulate the FIR Compiler MegaCor

Chapter 2: Getting Started 2–3MegaWizard Plug-In Manager Flow© May 2011 Altera Corporation FIR Compiler User Guide4. Verify that the device family is

2–4 Chapter 2: Getting StartedMegaWizard Plug-In Manager FlowFIR Compiler User Guide © May 2011 Altera Corporation2. Click Step 2: Setup Simulation in

Chapter 2: Getting Started 2–5MegaWizard Plug-In Manager Flow© May 2011 Altera Corporation FIR Compiler User Guidec Use the simulation models only for

Copyright © 2011 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device design

2–6 Chapter 2: Getting StartedMegaWizard Plug-In Manager FlowFIR Compiler User Guide © May 2011 Altera CorporationGenerate the MegaCore FunctionTo gen

Chapter 2: Getting Started 2–7MegaWizard Plug-In Manager Flow© May 2011 Altera Corporation FIR Compiler User Guide<variation name>.vec Quartus I

2–8 Chapter 2: Getting StartedMegaWizard Plug-In Manager FlowFIR Compiler User Guide © May 2011 Altera CorporationThe generation report also lists the

Chapter 2: Getting Started 2–9MegaWizard Plug-In Manager Flow© May 2011 Altera Corporation FIR Compiler User GuideSimulating in MATLABTo simulate in a

2–10 Chapter 2: Getting StartedMegaWizard Plug-In Manager FlowFIR Compiler User Guide © May 2011 Altera Corporation

© May 2011 Altera Corporation FIR Compiler User Guide3. Parameter SettingsThis chapter gives an example of how to parameterize a FIR Compiler MegaCore

3–2 Chapter 3: Parameter SettingsSpecifying the CoefficientsFIR Compiler User Guide © May 2011 Altera CorporationUsing the FIR Compiler Coefficient Ge

Chapter 3: Parameter Settings 3–3Specifying the Coefficients© May 2011 Altera Corporation FIR Compiler User Guide2. To generate the coefficients for a

3–4 Chapter 3: Parameter SettingsSpecifying the CoefficientsFIR Compiler User Guide © May 2011 Altera Corporation3. After making your settings, click

Chapter 3: Parameter Settings 3–5Specifying the Coefficients© May 2011 Altera Corporation FIR Compiler User Guide5. Click OK when you have finished ma

© May 2011 Altera Corporation FIR Compiler User GuideContentsChapter 1. About the FIR CompilerFeatures . . . . . . . . . . . . . . . . . . . . . . .

3–6 Chapter 3: Parameter SettingsSpecifying the CoefficientsFIR Compiler User Guide © May 2011 Altera CorporationLoading Coefficients from a FileTo lo

Chapter 3: Parameter Settings 3–7Specifying the Coefficients© May 2011 Altera Corporation FIR Compiler User Guide2. Browse in the file system for the

3–8 Chapter 3: Parameter SettingsAnalyzing the CoefficientsFIR Compiler User Guide © May 2011 Altera CorporationAnalyzing the CoefficientsThe FIR Comp

Chapter 3: Parameter Settings 3–9Specify the Input and Output Specifications© May 2011 Altera Corporation FIR Compiler User GuideFigure 3–7 shows the

3–10 Chapter 3: Parameter SettingsSpecify the Input and Output SpecificationsFIR Compiler User Guide © May 2011 Altera CorporationThe FIR Compiler cal

Chapter 3: Parameter Settings 3–11Specify the Architecture Specification© May 2011 Altera Corporation FIR Compiler User GuideWhen adjusting the input

3–12 Chapter 3: Parameter SettingsSpecify the Architecture SpecificationFIR Compiler User Guide © May 2011 Altera CorporationTable 3–4, Table 3–5, Tab

Chapter 3: Parameter Settings 3–13Specify the Architecture Specification© May 2011 Altera Corporation FIR Compiler User GuideTable 3–5. Fully Serial F

3–14 Chapter 3: Parameter SettingsSpecify the Architecture SpecificationFIR Compiler User Guide © May 2011 Altera CorporationCoefficient Reload If you

Chapter 3: Parameter Settings 3–15Specify the Architecture Specification© May 2011 Altera Corporation FIR Compiler User Guide1. For this tutorial, sel

iv ContentsFIR Compiler User Guide © May 2011 Altera CorporationInterpolation and Decimation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3–16 Chapter 3: Parameter SettingsResource EstimatesFIR Compiler User Guide © May 2011 Altera CorporationResource EstimatesThe FIR Compiler automatica

Chapter 3: Parameter Settings 3–17Filter Design Tips© May 2011 Altera Corporation FIR Compiler User Guide When importing floating-point coefficients,

3–18 Chapter 3: Parameter SettingsFilter Design TipsFIR Compiler User Guide © May 2011 Altera Corporation

© May 2011 Altera Corporation FIR Compiler User Guide4. Functional DescriptionFIR CompilerThe FIR Compiler has an interactive wizard-driven interface

4–2 Chapter 4: Functional DescriptionFIR CompilerFIR Compiler User Guide © May 2011 Altera Corporation Band Reject Raised Cosine Root Raised Cosine

Chapter 4: Functional Description 4–3FIR Compiler© May 2011 Altera Corporation FIR Compiler User GuideSymmetrical Architecture SelectionMany FIR filte

4–4 Chapter 4: Functional DescriptionFIR CompilerFIR Compiler User Guide © May 2011 Altera CorporationCoefficient Reloading and ReorderingAll of the F

Chapter 4: Functional Description 4–5FIR Compiler© May 2011 Altera Corporation FIR Compiler User Guidewhere: <FIR structure> is: MCV—multicycl

4–6 Chapter 4: Functional DescriptionFIR CompilerFIR Compiler User Guide © May 2011 Altera CorporationIf you select multiple-set coefficients, the fil

Chapter 4: Functional Description 4–7FIR Compiler© May 2011 Altera Corporation FIR Compiler User GuideSerial StructuresA serial structure trades off a

© May 2011 Altera Corporation FIR Compiler User Guide1. About the FIR CompilerThis document describes the Altera® FIR Compiler. The Altera FIR Compile

4–8 Chapter 4: Functional DescriptionFIR CompilerFIR Compiler User Guide © May 2011 Altera CorporationFigure 4–6 shows the area/speed “trade-off” of f

Chapter 4: Functional Description 4–9FIR Compiler© May 2011 Altera Corporation FIR Compiler User GuideMathematically, when a signal is interpolated, z

4–10 Chapter 4: Functional DescriptionFIR CompilerFIR Compiler User Guide © May 2011 Altera CorporationBecause the FIR Compiler is an automated design

Chapter 4: Functional Description 4–11FIR Compiler© May 2011 Altera Corporation FIR Compiler User GuideAvailability of Interpolation and Decimation Fi

4–12 Chapter 4: Functional DescriptionFIR CompilerFIR Compiler User Guide © May 2011 Altera CorporationAll multicycle variable structures allow the us

Chapter 4: Functional Description 4–13Simulation Output© May 2011 Altera Corporation FIR Compiler User GuideSimulation OutputThe FIR Compiler generate

4–14 Chapter 4: Functional DescriptionAvalon Streaming InterfaceFIR Compiler User Guide © May 2011 Altera CorporationThe Avalon Interface Specificatio

Chapter 4: Functional Description 4–15Avalon Streaming Interface© May 2011 Altera Corporation FIR Compiler User GuideThe sink indicates to the source

4–16 Chapter 4: Functional DescriptionSignalsFIR Compiler User Guide © May 2011 Altera CorporationThe data transfer in Figure 4–13 occurs on cycles 1,

Chapter 4: Functional Description 4–17Timing Diagrams© May 2011 Altera Corporation FIR Compiler User GuideTiming DiagramsThe reset_n signal resets the

1–2 Chapter 1: About the FIR CompilerFIR Compiler User Guide © May 2011 Altera CorporationThe structure of a FIR filter is a weighted, tapped delay li

4–18 Chapter 4: Functional DescriptionTiming DiagramsFIR Compiler User Guide © May 2011 Altera CorporationReset and Global Clock Enable OperationsFigu

Chapter 4: Functional Description 4–19Timing Diagrams© May 2011 Altera Corporation FIR Compiler User GuideThis filter accepts an input every clock cyc

4–20 Chapter 4: Functional DescriptionTiming DiagramsFIR Compiler User Guide © May 2011 Altera CorporationIn Figure 4–17, the flow is controlled by th

Chapter 4: Functional Description 4–21Timing Diagrams© May 2011 Altera Corporation FIR Compiler User GuideThese timing diagrams also apply to an MCV s

4–22 Chapter 4: Functional DescriptionTiming DiagramsFIR Compiler User Guide © May 2011 Altera CorporationIf the filter is time-shared by N, (that is

Chapter 4: Functional Description 4–23Timing Diagrams© May 2011 Altera Corporation FIR Compiler User GuideFor information about how to pre-calculate c

4–24 Chapter 4: Functional DescriptionTiming DiagramsFIR Compiler User Guide © May 2011 Altera CorporationMulticycle variable reloading is faster than

Chapter 4: Functional Description 4–25Timing Diagrams© May 2011 Altera Corporation FIR Compiler User GuideThe selection of the coefficient set for cal

4–26 Chapter 4: Functional DescriptionReferenced DocumentsFIR Compiler User Guide © May 2011 Altera CorporationReferenced DocumentsAltera application

© May 2011 Altera Corporation FIR Compiler User GuideA. FIR Compiler Supported DeviceStructuresSupported Device Structures Table A–1 lists the device

Chapter 1: About the FIR Compiler 1–3Features© May 2011 Altera Corporation FIR Compiler User Guide Automatically generating the code required for the

A–2 Appendix A: FIR Compiler Supported Device StructuresSupported Device StructuresFIR Compiler User Guide © May 2011 Altera CorporationParallel Fixed

Appendix A: FIR Compiler Supported Device Structures A–3Support for HardCopy Series Devices© May 2011 Altera Corporation FIR Compiler User GuideSuppor

A–4 Appendix A: FIR Compiler Supported Device StructuresSupport for HardCopy Series DevicesFIR Compiler User Guide © May 2011 Altera Corporation

© May 2011 Altera Corporation FIR Compiler User GuideAdditional InformationRevision HistoryThe following table displays the revision history for this

Info–2 Additional InformationHow to Contact AlteraFIR Compiler User Guide © May 2011 Altera CorporationHow to Contact AlteraFor the most up-to-date in

Additional Information Info–3Typographic Conventions© May 2011 Altera Corporation FIR Compiler User GuideItalic type Indicates variables. For example

Info–4 Additional InformationTypographic ConventionsFIR Compiler User Guide © May 2011 Altera Corporation

1–4 Chapter 1: About the FIR CompilerRelease InformationFIR Compiler User Guide © May 2011 Altera Corporation Precision control of chip resource util

Chapter 1: About the FIR Compiler 1–5Device Family Support© May 2011 Altera Corporation FIR Compiler User GuideDevice Family SupportTable 1–3 defines