Altera Mentor Verification IP Altera Edition AMBA AXI4-Li Instrukcja Użytkownika

Mentor Verification IP Altera Edition AMBA AXI4-Lite User GuideSoftware Version 10.3 April 2014© 2012-2014 Mentor Graphics CorporationAll rights reser

Table of Contents10April 2014Mentor Verification IP AE AXI4-Lite User Guide, V10.3Chapter 11VHDL Tutorials . . . . . . . . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.3100SystemVerilog Monitor BFMget_write_addr_phase()April 2014get_write_addr_phase()This blocking t

SystemVerilog Monitor BFMget_read_addr_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.3101April 2014get_read_addr_phase()This blocking tas

Mentor Verification IP AE AXI4-Lite User Guide, V10.3102SystemVerilog Monitor BFMget_read_data_phase()April 2014get_read_data_phase()This blocking tas

SystemVerilog Monitor BFMget_write_data_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.3103April 2014get_write_data_phase()This blocking t

Mentor Verification IP AE AXI4-Lite User Guide, V10.3104SystemVerilog Monitor BFMget_write_response_phaseApril 2014get_write_response_phaseThis blocki

SystemVerilog Monitor BFMget_read_addr_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.3105April 2014get_read_addr_ready()This blocking ta

Mentor Verification IP AE AXI4-Lite User Guide, V10.3106SystemVerilog Monitor BFMget_read_data_ready()April 2014get_read_data_ready()This blocking ta

SystemVerilog Monitor BFMget_write_addr_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.3107April 2014get_write_addr_ready()This blocking

Mentor Verification IP AE AXI4-Lite User Guide, V10.3108SystemVerilog Monitor BFMget_write_data_ready()April 2014get_write_data_ready()This blocking t

SystemVerilog Monitor BFMget_write_resp_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.3109April 2014get_write_resp_ready()This blocking

Table of ContentsMentor Verification IP AE AXI4-Lite User Guide, V10.311April 2014

Mentor Verification IP AE AXI4-Lite User Guide, V10.3110SystemVerilog Monitor BFMwait_on()April 2014wait_on()This blocking task waits for an event(s)

SystemVerilog Monitor BFMHelper FunctionsMentor Verification IP AE AXI4-Lite User Guide, V10.3111April 2014Helper FunctionsAMBA AXI protocols typicall

Mentor Verification IP AE AXI4-Lite User Guide, V10.3112SystemVerilog Monitor BFMget_read_addr()April 2014get_read_addr()This nonblocking function ret

SystemVerilog Monitor BFMset_read_data()Mentor Verification IP AE AXI4-Lite User Guide, V10.3113April 2014set_read_data()This nonblocking function set

Mentor Verification IP AE AXI4-Lite User Guide, V10.3114SystemVerilog Monitor BFMset_read_data()April 2014

Mentor Verification IP AE AXI4-Lite User Guide, V10.3115April 2014Chapter 6SystemVerilog TutorialsThis chapter discusses how to use the Mentor Verific

Mentor Verification IP AE AXI4-Lite User Guide, V10.3116SystemVerilog TutorialsVerifying a Slave DUTApril 2014In this example, the master test program

SystemVerilog TutorialsVerifying a Slave DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3117April 2014Figure 6-2. master_ready_delay_mode = AX

Mentor Verification IP AE AXI4-Lite User Guide, V10.3118SystemVerilog TutorialsVerifying a Slave DUTApril 2014Example 6-1 shows the configuration of t

SystemVerilog TutorialsVerifying a Slave DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3119April 2014Configuration and InitializationIn an in

12April 2014Mentor Verification IP AE AXI4-Lite User Guide, V10.3List of ExamplesExample 2-1. AXI4 Transaction Definition . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.3120SystemVerilog TutorialsVerifying a Slave DUTApril 2014Example 6-5. Create and Execute Write Tr

SystemVerilog TutorialsVerifying a Slave DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3121April 2014handle_write_resp_ready()The handle_writ

Mentor Verification IP AE AXI4-Lite User Guide, V10.3122SystemVerilog TutorialsVerifying a Slave DUTApril 2014Example 6-7. handle_write_resp_ready()//

SystemVerilog TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3123April 2014handle_read_data_ready()The handle_read

Mentor Verification IP AE AXI4-Lite User Guide, V10.3124SystemVerilog TutorialsVerifying a Master DUTApril 2014For a complete code listing of the slav

SystemVerilog TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3125April 2014Example 6-9. do_byte_read()// Function

Mentor Verification IP AE AXI4-Lite User Guide, V10.3126SystemVerilog TutorialsVerifying a Master DUTApril 2014Example 6-12. m_wr_addr_phase_ready_del

SystemVerilog TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3127April 2014Example 6-15 shows the BVALID signal de

Mentor Verification IP AE AXI4-Lite User Guide, V10.3128SystemVerilog TutorialsVerifying a Master DUTApril 2014Figure 6-6. slave_ready_delay_mode = AX

SystemVerilog TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3129April 2014Advanced Slave API DefinitionNoteYou ar

List of ExamplesMentor Verification IP AE AXI4-Lite User Guide, V10.313April 2014Example 11-15. process_write. . . . . . . . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.3130SystemVerilog TutorialsVerifying a Master DUTApril 2014Figure 6-7. Slave Test Program Advanced

SystemVerilog TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3131April 2014Initial BlockIn an initial block, the s

Mentor Verification IP AE AXI4-Lite User Guide, V10.3132SystemVerilog TutorialsVerifying a Master DUTApril 2014In the fork-join_none block, the read_t

SystemVerilog TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3133April 2014Example 6-19. handle_read// Task : hand

Mentor Verification IP AE AXI4-Lite User Guide, V10.3134SystemVerilog TutorialsVerifying a Master DUTApril 2014WSTRB write strobes signal. There is an

SystemVerilog TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3135April 2014Example 6-22. handle_write_addr_ready()

Mentor Verification IP AE AXI4-Lite User Guide, V10.3136SystemVerilog TutorialsVerifying a Master DUTApril 2014handle_read_addr_ready()The handle_read

Mentor Verification IP AE AXI4-Lite User Guide, V10.3137April 2014Chapter 7VHDL API OverviewThis chapter describes the VHDL Application Programming In

Mentor Verification IP AE AXI4-Lite User Guide, V10.3138VHDL API OverviewApril 2014Figure 7-1. VHDL BFM Internal StructureTest Program VHDLSystemVeril

VHDL API OverviewConfigurationMentor Verification IP AE AXI4-Lite User Guide, V10.3139April 2014ConfigurationConfiguration sets timeout delays, error

Mentor Verification IP AE AXI4-Lite User Guide, V10.314April 2014List of FiguresFigure 1-1. Execute Write Transaction . . . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.3140VHDL API OverviewCreating TransactionsApril 2014Protocol fields hold transaction information t

VHDL API OverviewCreating TransactionsMentor Verification IP AE AXI4-Lite User Guide, V10.3141April 2014NoteThe axi4_transaction class code above is s

Mentor Verification IP AE AXI4-Lite User Guide, V10.3142VHDL API OverviewCreating TransactionsApril 2014resp An enumeration array to hold the response

VHDL API OverviewCreating TransactionsMentor Verification IP AE AXI4-Lite User Guide, V10.3143April 2014The master BFM API allows you to create a mast

Mentor Verification IP AE AXI4-Lite User Guide, V10.3144VHDL API OverviewExecuting TransactionsApril 2014-- Define local variables to hold the transac

VHDL API OverviewWaiting EventsMentor Verification IP AE AXI4-Lite User Guide, V10.3145April 2014Waiting EventsEach BFM API has procedures that block

Mentor Verification IP AE AXI4-Lite User Guide, V10.3146VHDL API OverviewAccess Transaction RecordApril 2014Access Transaction RecordEach BFM API has

VHDL API OverviewOperational Transaction FieldsMentor Verification IP AE AXI4-Lite User Guide, V10.3147April 2014previously set write_strobes is perfo

Mentor Verification IP AE AXI4-Lite User Guide, V10.3148VHDL API OverviewOperational Transaction FieldsApril 2014Handshake DelayThe delay between the

VHDL API OverviewOperational Transaction FieldsMentor Verification IP AE AXI4-Lite User Guide, V10.3149April 2014*READY Handshake Signal Delay Transac

15April 2014Mentor Verification IP AE AXI4-Lite User Guide, V10.3List of TablesTable-1. Simulator GCC Requirements . . . . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.3150VHDL API OverviewOperational Transaction FieldsApril 2014

Mentor Verification IP AE AXI4-Lite User Guide, V10.3151April 2014Chapter 8VHDL Master BFMThis chapter provides information about the VHDL master BFM.

Mentor Verification IP AE AXI4-Lite User Guide, V10.3152VHDL Master BFMMaster BFM Protocol SupportApril 2014Master BFM Protocol SupportThe AXI4-Litema

VHDL Master BFMMaster BFM ConfigurationMentor Verification IP AE AXI4-Lite User Guide, V10.3153April 2014A master BFM has configuration fields that yo

Mentor Verification IP AE AXI4-Lite User Guide, V10.3154VHDL Master BFMMaster BFM ConfigurationApril 2014AXI4_CONFIG_MAX_LATENCY_AWVALID_ASSERTION_TO_

VHDL Master BFMMaster AssertionsMentor Verification IP AE AXI4-Lite User Guide, V10.3155April 20141. Refer to Master Timing and Events for details of

Mentor Verification IP AE AXI4-Lite User Guide, V10.3156VHDL Master BFMVHDL Master APIApril 2014NoteDo not confuse the AXI4_CONFIG_ENABLE_ASSERTION bi

VHDL Master BFMset_config()Mentor Verification IP AE AXI4-Lite User Guide, V10.3157April 2014Exampleset_config(AXI4_MAX_TRANSACTION_TIME_FACTOR, 1000,

Mentor Verification IP AE AXI4-Lite User Guide, V10.3158VHDL Master BFMget_config()April 2014get_config()This nonblocking procedure gets the configura

VHDL Master BFMcreate_write_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.3159April 2014create_write_transaction()This nonblocking

List of Tables16April 2014Mentor Verification IP AE AXI4-Lite User Guide, V10.3

Mentor Verification IP AE AXI4-Lite User Guide, V10.3160VHDL Master BFMcreate_write_transaction()April 2014Example-- Create a write data transaction t

VHDL Master BFMcreate_read_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.3161April 2014create_read_transaction()This nonblocking pr

Mentor Verification IP AE AXI4-Lite User Guide, V10.3162VHDL Master BFMcreate_read_transaction()April 2014Example-- Create a read data transaction wit

VHDL Master BFMset_addr()Mentor Verification IP AE AXI4-Lite User Guide, V10.3163April 2014set_addr()This nonblocking procedure sets the start address

Mentor Verification IP AE AXI4-Lite User Guide, V10.3164VHDL Master BFMget_addr()April 2014get_addr()This nonblocking procedure gets the start address

VHDL Master BFMset_prot()Mentor Verification IP AE AXI4-Lite User Guide, V10.3165April 2014set_prot()This nonblocking procedure sets the protection pr

Mentor Verification IP AE AXI4-Lite User Guide, V10.3166VHDL Master BFMget_prot()April 2014get_prot()This nonblocking procedure gets the protection pr

VHDL Master BFMset_data_words()Mentor Verification IP AE AXI4-Lite User Guide, V10.3167April 2014set_data_words()This nonblocking procedure sets a dat

Mentor Verification IP AE AXI4-Lite User Guide, V10.3168VHDL Master BFMget_data_words()April 2014get_data_words()This nonblocking procedure gets a dat

VHDL Master BFMset_write_strobes()Mentor Verification IP AE AXI4-Lite User Guide, V10.3169April 2014set_write_strobes()This nonblocking procedure sets

Mentor Verification IP AE AXI4-Lite User Guide, V10.317April 2014PrefaceAbout This User GuideThis user guide describes the AXI4-Lite application inte

Mentor Verification IP AE AXI4-Lite User Guide, V10.3170VHDL Master BFMget_write_strobes()April 2014get_write_strobes()This nonblocking procedure gets

VHDL Master BFMset_resp()Mentor Verification IP AE AXI4-Lite User Guide, V10.3171April 2014set_resp()This nonblocking procedure sets a response resp f

Mentor Verification IP AE AXI4-Lite User Guide, V10.3172VHDL Master BFMget_resp()April 2014get_resp()This nonblocking procedure gets a response resp f

VHDL Master BFMset_read_or_write()Mentor Verification IP AE AXI4-Lite User Guide, V10.3173April 2014set_read_or_write()This nonblocking procedure sets

Mentor Verification IP AE AXI4-Lite User Guide, V10.3174VHDL Master BFMget_read_or_write()April 2014get_read_or_write()This nonblocking procedure gets

VHDL Master BFMset_gen_write_strobes()Mentor Verification IP AE AXI4-Lite User Guide, V10.3175April 2014set_gen_write_strobes()This nonblocking proced

Mentor Verification IP AE AXI4-Lite User Guide, V10.3176VHDL Master BFMget_gen_write_strobes()April 2014get_gen_write_strobes()This nonblocking proced

VHDL Master BFMset_operation_mode()Mentor Verification IP AE AXI4-Lite User Guide, V10.3177April 2014set_operation_mode()This nonblocking procedure se

Mentor Verification IP AE AXI4-Lite User Guide, V10.3178VHDL Master BFMget_operation_mode()April 2014get_operation_mode()This nonblocking procedure ge

VHDL Master BFMset_write_data_mode()Mentor Verification IP AE AXI4-Lite User Guide, V10.3179April 2014set_write_data_mode()This nonblocking procedure

Mentor Verification IP AE AXI4-Lite User Guide, V10.318PrefaceMentor VIP AE License RequirementsApril 2014Mentor VIP AE License RequirementsNoteA lice

Mentor Verification IP AE AXI4-Lite User Guide, V10.3180VHDL Master BFMget_write_data_mode()April 2014get_write_data_mode()This nonblocking procedure

VHDL Master BFMset_address_valid_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3181April 2014set_address_valid_delay()This nonblocking pr

Mentor Verification IP AE AXI4-Lite User Guide, V10.3182VHDL Master BFMget_address_valid_delay()April 2014get_address_valid_delay()This nonblocking pr

VHDL Master BFMget_address_ready_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3183April 2014get_address_ready_delay()This nonblocking pr

Mentor Verification IP AE AXI4-Lite User Guide, V10.3184VHDL Master BFMset_data_valid_delay()April 2014set_data_valid_delay()This nonblocking procedur

VHDL Master BFMget_data_valid_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3185April 2014get_data_valid_delay()This nonblocking procedur

Mentor Verification IP AE AXI4-Lite User Guide, V10.3186VHDL Master BFMget_data_ready_delay()April 2014get_data_ready_delay()This nonblocking procedur

VHDL Master BFMset_write_response_valid_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3187April 2014set_write_response_valid_delay()This

Mentor Verification IP AE AXI4-Lite User Guide, V10.3188VHDL Master BFMget_write_response_valid_delay()April 2014get_write_response_valid_delay()This

VHDL Master BFMget_write_response_ready_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3189April 2014get_write_response_ready_delay()This

PrefaceSimulator GCC RequirementsMentor Verification IP AE AXI4-Lite User Guide, V10.319April 2014Table-1. Simulator GCC RequirementsSimulator Version

Mentor Verification IP AE AXI4-Lite User Guide, V10.3190VHDL Master BFMset_transaction_done()April 2014set_transaction_done()This nonblocking procedur

VHDL Master BFMget_transaction_done()Mentor Verification IP AE AXI4-Lite User Guide, V10.3191April 2014get_transaction_done()This nonblocking procedur

Mentor Verification IP AE AXI4-Lite User Guide, V10.3192VHDL Master BFMexecute_transaction()April 2014execute_transaction()This procedure executes a m

VHDL Master BFMexecute_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.3193April 2014Example-- Create a read transaction with start a

Mentor Verification IP AE AXI4-Lite User Guide, V10.3194VHDL Master BFMexecute_write_addr_phase()April 2014execute_write_addr_phase()This procedure ex

VHDL Master BFMexecute_read_addr_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.3195April 2014execute_read_addr_phase()This procedure exec

Mentor Verification IP AE AXI4-Lite User Guide, V10.3196VHDL Master BFMexecute_write_data_phase()April 2014execute_write_data_phase()This procedure ex

VHDL Master BFMget_read_data_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.3197April 2014get_read_data_phase()This blocking procedure get

Mentor Verification IP AE AXI4-Lite User Guide, V10.3198VHDL Master BFMget_write_response_phase()April 2014get_write_response_phase()This blocking pro

VHDL Master BFMget_read_addr_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.3199April 2014get_read_addr_ready()This blocking procedure ret

This document is for information and instruction purposes. Mentor Graphics reserves the right to make changes in specifications and other information

Mentor Verification IP AE AXI4-Lite User Guide, V10.320PrefaceSimulator GCC RequirementsApril 2014

Mentor Verification IP AE AXI4-Lite User Guide, V10.3200VHDL Master BFMget_read_data_cycle()April 2014get_read_data_cycle()This blocking procedure wai

VHDL Master BFMexecute_read_data_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.3201April 2014execute_read_data_ready()This procedure exec

Mentor Verification IP AE AXI4-Lite User Guide, V10.3202VHDL Master BFMget_write_addr_ready()April 2014get_write_addr_ready()This blocking procedure r

VHDL Master BFMget_write_data_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.3203April 2014get_write_data_ready()This blocking procedure r

Mentor Verification IP AE AXI4-Lite User Guide, V10.3204VHDL Master BFMget_write_response_cycle()April 2014get_write_response_cycle()This blocking pro

VHDL Master BFMexecute_write_resp_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.3205April 2014execute_write_resp_ready()This procedure ex

Mentor Verification IP AE AXI4-Lite User Guide, V10.3206VHDL Master BFMpush_transaction_id()April 2014push_transaction_id()This nonblocking procedure

VHDL Master BFMpush_transaction_id()Mentor Verification IP AE AXI4-Lite User Guide, V10.3207April 2014Example-- Create a write transaction with start

Mentor Verification IP AE AXI4-Lite User Guide, V10.3208VHDL Master BFMpop_transaction_id()April 2014pop_transaction_id()This nonblocking (unless queu

VHDL Master BFMpop_transaction_id()Mentor Verification IP AE AXI4-Lite User Guide, V10.3209April 2014Example-- Create a write transaction with start a

Mentor Verification IP AE AXI4-Lite User Guide, V10.321April 2014Chapter 1Mentor VIP Altera EditionThe Mentor VIP AE provides BFMs to simulate the beh

Mentor Verification IP AE AXI4-Lite User Guide, V10.3210VHDL Master BFMprint()April 2014print()This nonblocking procedure prints a transaction record

VHDL Master BFMdestruct_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.3211April 2014destruct_transaction()This blocking procedure r

Mentor Verification IP AE AXI4-Lite User Guide, V10.3212VHDL Master BFMwait_on()April 2014wait_on()This blocking task waits for an event(s) on the ACL

Mentor Verification IP AE AXI4-Lite User Guide, V10.3213April 2014Chapter 9VHDL Slave BFMThis chapter provides information about the VHDL slave BFM. T

Mentor Verification IP AE AXI4-Lite User Guide, V10.3214VHDL Slave BFMSlave BFM ConfigurationApril 2014A slave BFM has configuration fields that you c

VHDL Slave BFMSlave BFM ConfigurationMentor Verification IP AE AXI4-Lite User Guide, V10.3215April 2014AXI4_CONFIG_HOLD_TIME The hold-time after the a

Mentor Verification IP AE AXI4-Lite User Guide, V10.3216VHDL Slave BFMSlave AssertionsApril 20141. Refer to Slave Timing and Events for details of sim

VHDL Slave BFMVHDL Slave APIMentor Verification IP AE AXI4-Lite User Guide, V10.3217April 2014NoteThe built-in BFM assertions are independent of progr

Mentor Verification IP AE AXI4-Lite User Guide, V10.3218VHDL Slave BFMset_config()April 2014set_config()This nonblocking procedure sets the configurat

VHDL Slave BFMset_config()Mentor Verification IP AE AXI4-Lite User Guide, V10.3219April 2014Exampleset_config(AXI4_CONFIG_MAX_TRANSACTION_TIME_FACTOR,

Mentor Verification IP AE AXI4-Lite User Guide, V10.322Mentor VIP Altera EditionWhat Is a Transaction?April 2014What Is a Transaction?A transaction fo

Mentor Verification IP AE AXI4-Lite User Guide, V10.3220VHDL Slave BFMget_config()April 2014get_config()This nonblocking procedure gets the configurat

VHDL Slave BFMget_config()Mentor Verification IP AE AXI4-Lite User Guide, V10.3221April 2014Exampleget_config(AXI4_CONFIG_MAX_TRANSACTION_TIME_FACTOR,

Mentor Verification IP AE AXI4-Lite User Guide, V10.3222VHDL Slave BFMcreate_slave_transaction()April 2014create_slave_transaction()This nonblocking p

VHDL Slave BFMcreate_slave_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.3223April 2014Example-- Create a slave transaction-- Retur

Mentor Verification IP AE AXI4-Lite User Guide, V10.3224VHDL Slave BFMset_addr()April 2014set_addr()This nonblocking procedure sets the start address

VHDL Slave BFMget_addr()Mentor Verification IP AE AXI4-Lite User Guide, V10.3225April 2014get_addr()This nonblocking procedure gets the start address

Mentor Verification IP AE AXI4-Lite User Guide, V10.3226VHDL Slave BFMset_prot()April 2014set_prot()This nonblocking procedure sets the protection pro

VHDL Slave BFMget_prot()Mentor Verification IP AE AXI4-Lite User Guide, V10.3227April 2014get_prot()This nonblocking procedure gets the protection pro

Mentor Verification IP AE AXI4-Lite User Guide, V10.3228VHDL Slave BFMset_data_words()April 2014set_data_words()This nonblocking procedure sets the re

VHDL Slave BFMget_data_words()Mentor Verification IP AE AXI4-Lite User Guide, V10.3229April 2014get_data_words()This nonblocking procedure gets a data

Mentor VIP Altera EditionAXI4-Lite TransactionsMentor Verification IP AE AXI4-Lite User Guide, V10.323April 2014and *READY, that indicates valid infor

Mentor Verification IP AE AXI4-Lite User Guide, V10.3230VHDL Slave BFMset_write_strobes()April 2014set_write_strobes()This nonblocking procedure sets

VHDL Slave BFMget_write_strobes()Mentor Verification IP AE AXI4-Lite User Guide, V10.3231April 2014get_write_strobes()This nonblocking procedure gets

Mentor Verification IP AE AXI4-Lite User Guide, V10.3232VHDL Slave BFMset_resp()April 2014set_resp()This nonblocking procedure sets the response resp

VHDL Slave BFMget_resp()Mentor Verification IP AE AXI4-Lite User Guide, V10.3233April 2014get_resp()This nonblocking procedure gets a response resp fi

Mentor Verification IP AE AXI4-Lite User Guide, V10.3234VHDL Slave BFMset_read_or_write()April 2014set_read_or_write()This procedure sets the read_or_

VHDL Slave BFMget_read_or_write()Mentor Verification IP AE AXI4-Lite User Guide, V10.3235April 2014get_read_or_write()This nonblocking procedure gets

Mentor Verification IP AE AXI4-Lite User Guide, V10.3236VHDL Slave BFMset_gen_write_strobes()April 2014set_gen_write_strobes()This nonblocking procedu

VHDL Slave BFMget_gen_write_strobes()Mentor Verification IP AE AXI4-Lite User Guide, V10.3237April 2014get_gen_write_strobes()This nonblocking procedu

Mentor Verification IP AE AXI4-Lite User Guide, V10.3238VHDL Slave BFMset_operation_mode()April 2014set_operation_mode()This nonblocking procedure set

VHDL Slave BFMget_operation_mode()Mentor Verification IP AE AXI4-Lite User Guide, V10.3239April 2014get_operation_mode()This nonblocking procedure get

Mentor Verification IP AE AXI4-Lite User Guide, V10.324Mentor VIP Altera EditionAXI4-Lite TransactionsApril 2014Figure 1-2. Master Write Transaction P

Mentor Verification IP AE AXI4-Lite User Guide, V10.3240VHDL Slave BFMset_write_data_mode()April 2014set_write_data_mode()This nonblocking procedure s

VHDL Slave BFMget_write_data_mode()Mentor Verification IP AE AXI4-Lite User Guide, V10.3241April 2014get_write_data_mode()This nonblocking procedure g

Mentor Verification IP AE AXI4-Lite User Guide, V10.3242VHDL Slave BFMset_address_valid_delay()April 2014set_address_valid_delay()This nonblocking pro

VHDL Slave BFMget_address_valid_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3243April 2014get_address_valid_delay()This nonblocking pro

Mentor Verification IP AE AXI4-Lite User Guide, V10.3244VHDL Slave BFMget_address_ready_delay()April 2014get_address_ready_delay()This nonblocking pro

VHDL Slave BFMset_data_valid_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3245April 2014set_data_valid_delay()This nonblocking procedure

Mentor Verification IP AE AXI4-Lite User Guide, V10.3246VHDL Slave BFMget_data_valid_delay()April 2014get_data_valid_delay()This nonblocking procedure

VHDL Slave BFMget_data_ready_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3247April 2014get_data_ready_delay()This nonblocking procedure

Mentor Verification IP AE AXI4-Lite User Guide, V10.3248VHDL Slave BFMset_write_response_valid_delay()April 2014set_write_response_valid_delay()This n

VHDL Slave BFMget_write_response_valid_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3249April 2014get_write_response_valid_delay()This n

Mentor VIP Altera EditionAXI4-Lite TransactionsMentor Verification IP AE AXI4-Lite User Guide, V10.325April 2014Figure 1-3. Slave Write Transaction Ph

Mentor Verification IP AE AXI4-Lite User Guide, V10.3250VHDL Slave BFMget_write_response_ready_delay()April 2014get_write_response_ready_delay()This n

VHDL Slave BFMset_transaction_done()Mentor Verification IP AE AXI4-Lite User Guide, V10.3251April 2014set_transaction_done()This nonblocking procedure

Mentor Verification IP AE AXI4-Lite User Guide, V10.3252VHDL Slave BFMget_transaction_done()April 2014get_transaction_done()This nonblocking procedure

VHDL Slave BFMexecute_read_data_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.3253April 2014execute_read_data_phase()This procedure execu

Mentor Verification IP AE AXI4-Lite User Guide, V10.3254VHDL Slave BFMexecute_write_response_phase()April 2014execute_write_response_phase()This proce

VHDL Slave BFMget_write_addr_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.3255April 2014get_write_addr_phase()This blocking procedure ge

Mentor Verification IP AE AXI4-Lite User Guide, V10.3256VHDL Slave BFMget_read_addr_phase()April 2014get_read_addr_phase()This blocking procedure gets

VHDL Slave BFMget_write_data_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.3257April 2014get_write_data_phase()This blocking procedure ge

Mentor Verification IP AE AXI4-Lite User Guide, V10.3258VHDL Slave BFMget_read_addr_cycle()April 2014get_read_addr_cycle()This blocking procedure wait

VHDL Slave BFMexecute_read_addr_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.3259April 2014execute_read_addr_ready()This procedure execu

Mentor Verification IP AE AXI4-Lite User Guide, V10.326Mentor VIP Altera EditionAXI4-Lite TransactionsApril 2014Figure 1-4. Master Read Transaction Ph

Mentor Verification IP AE AXI4-Lite User Guide, V10.3260VHDL Slave BFMget_read_data_ready()April 2014get_read_data_ready()This blocking procedure retu

VHDL Slave BFMget_write_addr_cycle()Mentor Verification IP AE AXI4-Lite User Guide, V10.3261April 2014get_write_addr_cycle()This blocking procedure wa

Mentor Verification IP AE AXI4-Lite User Guide, V10.3262VHDL Slave BFMexecute_write_addr_ready()April 2014execute_write_addr_ready()This procedure exe

VHDL Slave BFMget_write_data_cycle()Mentor Verification IP AE AXI4-Lite User Guide, V10.3263April 2014get_write_data_cycle()This blocking procedure wa

Mentor Verification IP AE AXI4-Lite User Guide, V10.3264VHDL Slave BFMexecute_write_data_ready()April 2014execute_write_data_ready()This procedure exe

VHDL Slave BFMget_write_resp_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.3265April 2014get_write_resp_ready()This blocking procedure re

Mentor Verification IP AE AXI4-Lite User Guide, V10.3266VHDL Slave BFMpush_transaction_id()April 2014push_transaction_id()This nonblocking procedure p

VHDL Slave BFMpush_transaction_id()Mentor Verification IP AE AXI4-Lite User Guide, V10.3267April 2014Example-- Create a slave transaction. Creation re

Mentor Verification IP AE AXI4-Lite User Guide, V10.3268VHDL Slave BFMpop_transaction_id()April 2014pop_transaction_id()This nonblocking (unless queue

VHDL Slave BFMpop_transaction_id()Mentor Verification IP AE AXI4-Lite User Guide, V10.3269April 2014Example-- Create a slave transaction. Creation ret

Mentor Verification IP AE AXI4-Lite User Guide, V10.327April 2014Chapter 2SystemVerilog API OverviewThis chapter provides the functional description o

Mentor Verification IP AE AXI4-Lite User Guide, V10.3270VHDL Slave BFMprint()April 2014print()This nonblocking procedure prints a transaction record t

VHDL Slave BFMdestruct_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.3271April 2014destruct_transaction()This blocking procedure re

Mentor Verification IP AE AXI4-Lite User Guide, V10.3272VHDL Slave BFMwait_on()April 2014wait_on()This blocking procedure waits for an event on the AC

VHDL Slave BFMHelper FunctionsMentor Verification IP AE AXI4-Lite User Guide, V10.3273April 2014Helper FunctionsAMBA AXI protocols typically provide a

Mentor Verification IP AE AXI4-Lite User Guide, V10.3274VHDL Slave BFMget_write_addr_data()April 2014Example-- Wait for a write data phase to complete

VHDL Slave BFMget_read_addr()Mentor Verification IP AE AXI4-Lite User Guide, V10.3275April 2014get_read_addr()This nonblocking procedure returns the a

Mentor Verification IP AE AXI4-Lite User Guide, V10.3276VHDL Slave BFMget_read_addr()April 2014Example-- Get the byte address and number of bytes in t

VHDL Slave BFMset_read_data()Mentor Verification IP AE AXI4-Lite User Guide, V10.3277April 2014set_read_data()This nonblocking procedure sets a read d

Mentor Verification IP AE AXI4-Lite User Guide, V10.3278VHDL Slave BFMset_read_data()April 2014Example-- Get the byte address and number of bytes in t

Mentor Verification IP AE AXI4-Lite User Guide, V10.3279April 2014Chapter 10VHDL Monitor BFMThis chapter provides information about the VHDL monitor B

Mentor Verification IP AE AXI4-Lite User Guide, V10.328SystemVerilog API OverviewConfigurationApril 2014ConfigurationConfiguration sets timeout delays

Mentor Verification IP AE AXI4-Lite User Guide, V10.3280VHDL Monitor BFMMonitor BFM ConfigurationApril 2014contain any timescale, timeunit, or timepre

VHDL Monitor BFMMonitor BFM ConfigurationMentor Verification IP AE AXI4-Lite User Guide, V10.3281April 2014A monitor BFM has configuration fields that

Mentor Verification IP AE AXI4-Lite User Guide, V10.3282VHDL Monitor BFMMonitor AssertionsApril 20141. Refer to Monitor Timing and Events for details

VHDL Monitor BFMVHDL Monitor APIMentor Verification IP AE AXI4-Lite User Guide, V10.3283April 2014Assertion ConfigurationBy default, all built-in asse

Mentor Verification IP AE AXI4-Lite User Guide, V10.3284VHDL Monitor BFMset_config()April 2014set_config()This nonblocking procedure sets the configur

VHDL Monitor BFMget_config()Mentor Verification IP AE AXI4-Lite User Guide, V10.3285April 2014get_config()This nonblocking procedure gets the configur

Mentor Verification IP AE AXI4-Lite User Guide, V10.3286VHDL Monitor BFMcreate_monitor_transaction()April 2014create_monitor_transaction()This nonbloc

VHDL Monitor BFMcreate_monitor_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.3287April 2014Example-- Create a monitor transaction--

Mentor Verification IP AE AXI4-Lite User Guide, V10.3288VHDL Monitor BFMset_addr()April 2014set_addr()This nonblocking procedure sets the start addres

VHDL Monitor BFMget_addr()Mentor Verification IP AE AXI4-Lite User Guide, V10.3289April 2014get_addr()This nonblocking procedure gets the start addres

SystemVerilog API OverviewCreating TransactionsMentor Verification IP AE AXI4-Lite User Guide, V10.329April 2014Operational fields define how and when

Mentor Verification IP AE AXI4-Lite User Guide, V10.3290VHDL Monitor BFMset_prot()April 2014set_prot()This nonblocking procedure sets the protection p

VHDL Monitor BFMget_prot()Mentor Verification IP AE AXI4-Lite User Guide, V10.3291April 2014get_prot()This nonblocking procedure gets the protection p

Mentor Verification IP AE AXI4-Lite User Guide, V10.3292VHDL Monitor BFMset_data_words()April 2014set_data_words()This nonblocking procedure sets the

VHDL Monitor BFMget_data_words()Mentor Verification IP AE AXI4-Lite User Guide, V10.3293April 2014get_data_words()This nonblocking procedure gets a da

Mentor Verification IP AE AXI4-Lite User Guide, V10.3294VHDL Monitor BFMset_write_strobes()April 2014set_write_strobes()This nonblocking procedure set

VHDL Monitor BFMget_write_strobes()Mentor Verification IP AE AXI4-Lite User Guide, V10.3295April 2014get_write_strobes()This nonblocking procedure get

Mentor Verification IP AE AXI4-Lite User Guide, V10.3296VHDL Monitor BFMset_resp()April 2014set_resp()This nonblocking procedure sets the response res

VHDL Monitor BFMget_resp()Mentor Verification IP AE AXI4-Lite User Guide, V10.3297April 2014get_resp()This nonblocking procedure gets a response resp

Mentor Verification IP AE AXI4-Lite User Guide, V10.3298VHDL Monitor BFMset_read_or_write()April 2014set_read_or_write()This procedure sets the read_o

VHDL Monitor BFMget_read_or_write()Mentor Verification IP AE AXI4-Lite User Guide, V10.3299April 2014get_read_or_write()This nonblocking procedure get

Mentor Verification IP AE AXI4-Lite User Guide, V10.33April 2014Table of ContentsPreface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.330SystemVerilog API OverviewCreating TransactionsApril 2014The contents of the transaction record

Mentor Verification IP AE AXI4-Lite User Guide, V10.3300VHDL Monitor BFMset_gen_write_strobes()April 2014set_gen_write_strobes()This nonblocking proce

VHDL Monitor BFMget_gen_write_strobes()Mentor Verification IP AE AXI4-Lite User Guide, V10.3301April 2014get_gen_write_strobes()This nonblocking proce

Mentor Verification IP AE AXI4-Lite User Guide, V10.3302VHDL Monitor BFMset_operation_mode()April 2014set_operation_mode()This nonblocking procedure s

VHDL Monitor BFMget_operation_mode()Mentor Verification IP AE AXI4-Lite User Guide, V10.3303April 2014get_operation_mode()This nonblocking procedure g

Mentor Verification IP AE AXI4-Lite User Guide, V10.3304VHDL Monitor BFMset_write_data_mode()April 2014set_write_data_mode()This nonblocking procedure

VHDL Monitor BFMget_write_data_mode()Mentor Verification IP AE AXI4-Lite User Guide, V10.3305April 2014get_write_data_mode()This nonblocking procedure

Mentor Verification IP AE AXI4-Lite User Guide, V10.3306VHDL Monitor BFMset_address_valid_delay()April 2014set_address_valid_delay()This nonblocking p

VHDL Monitor BFMget_address_valid_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3307April 2014get_address_valid_delay()This nonblocking p

Mentor Verification IP AE AXI4-Lite User Guide, V10.3308VHDL Monitor BFMget_address_ready_delay()April 2014get_address_ready_delay()This nonblocking p

VHDL Monitor BFMset_data_valid_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3309April 2014set_data_valid_delay()This nonblocking procedu

SystemVerilog API OverviewCreating TransactionsMentor Verification IP AE AXI4-Lite User Guide, V10.331April 2014Operational Transaction Fieldsread_or_

Mentor Verification IP AE AXI4-Lite User Guide, V10.3310VHDL Monitor BFMget_data_valid_delay()April 2014get_data_valid_delay()This nonblocking procedu

VHDL Monitor BFMget_data_ready_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3311April 2014get_data_ready_delay()This nonblocking procedu

Mentor Verification IP AE AXI4-Lite User Guide, V10.3312VHDL Monitor BFMget_write_response_valid_delay()April 2014get_write_response_valid_delay()This

VHDL Monitor BFMget_write_response_ready_delay()Mentor Verification IP AE AXI4-Lite User Guide, V10.3313April 2014get_write_response_ready_delay()This

Mentor Verification IP AE AXI4-Lite User Guide, V10.3314VHDL Monitor BFMset_transaction_done()April 2014set_transaction_done()This nonblocking procedu

VHDL Monitor BFMget_transaction_done()Mentor Verification IP AE AXI4-Lite User Guide, V10.3315April 2014get_transaction_done()This nonblocking procedu

Mentor Verification IP AE AXI4-Lite User Guide, V10.3316VHDL Monitor BFMget_read_data_phase()April 2014get_read_data_phase()This blocking procedure ge

VHDL Monitor BFMget_write_response_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.3317April 2014get_write_response_phase()This blocking pr

Mentor Verification IP AE AXI4-Lite User Guide, V10.3318VHDL Monitor BFMget_write_addr_phase()April 2014get_write_addr_phase()This blocking procedure

VHDL Monitor BFMget_read_addr_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.3319April 2014get_read_addr_phase()This blocking procedure ge

Mentor Verification IP AE AXI4-Lite User Guide, V10.332SystemVerilog API OverviewCreating TransactionsApril 2014The master BFM API allows you to creat

Mentor Verification IP AE AXI4-Lite User Guide, V10.3320VHDL Monitor BFMget_write_data_phase()April 2014get_write_data_phase()This blocking procedure

VHDL Monitor BFMget_rw_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.3321April 2014get_rw_transaction()This blocking procedure gets

Mentor Verification IP AE AXI4-Lite User Guide, V10.3322VHDL Monitor BFMget_read_addr_ready()April 2014get_read_addr_ready()This blocking procedure re

VHDL Monitor BFMget_read_data_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.3323April 2014get_read_data_ready()This blocking procedure re

Mentor Verification IP AE AXI4-Lite User Guide, V10.3324VHDL Monitor BFMget_write_addr_ready()April 2014get_write_addr_ready()This blocking procedure

VHDL Monitor BFMget_write_data_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.3325April 2014get_write_data_ready()This blocking procedure

Mentor Verification IP AE AXI4-Lite User Guide, V10.3326VHDL Monitor BFMget_write_resp_ready()April 2014get_write_resp_ready()This blocking procedure

VHDL Monitor BFMpush_transaction_id()Mentor Verification IP AE AXI4-Lite User Guide, V10.3327April 2014push_transaction_id()This nonblocking procedure

Mentor Verification IP AE AXI4-Lite User Guide, V10.3328VHDL Monitor BFMpush_transaction_id()April 2014Example-- Create a monitor transaction. Creatio

VHDL Monitor BFMpop_transaction_id()Mentor Verification IP AE AXI4-Lite User Guide, V10.3329April 2014pop_transaction_id()This nonblocking (unless que

SystemVerilog API OverviewExecuting TransactionsMentor Verification IP AE AXI4-Lite User Guide, V10.333April 2014Executing TransactionsExecuting a tra

Mentor Verification IP AE AXI4-Lite User Guide, V10.3330VHDL Monitor BFMpop_transaction_id()April 2014Example-- Create a monitor transaction. Creation

VHDL Monitor BFMprint()Mentor Verification IP AE AXI4-Lite User Guide, V10.3331April 2014print()This nonblocking procedure prints a transaction record

Mentor Verification IP AE AXI4-Lite User Guide, V10.3332VHDL Monitor BFMdestruct_transaction()April 2014destruct_transaction()This blocking procedure

VHDL Monitor BFMwait_on()Mentor Verification IP AE AXI4-Lite User Guide, V10.3333April 2014wait_on()This blocking procedure waits for an event on the

Mentor Verification IP AE AXI4-Lite User Guide, V10.3334VHDL Monitor BFMwait_on()April 2014

Mentor Verification IP AE AXI4-Lite User Guide, V10.3335April 2014Chapter 11VHDL TutorialsThis chapter discusses how to use the Mentor Verification IP

Mentor Verification IP AE AXI4-Lite User Guide, V10.3336VHDL TutorialsVerifying a Slave DUTApril 2014In this example, the master test program also com

VHDL TutorialsVerifying a Slave DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3337April 2014Example 11-2. m_rd_data_phase_ready_delay-- Varia

Mentor Verification IP AE AXI4-Lite User Guide, V10.3338VHDL TutorialsVerifying a Slave DUTApril 2014Example 11-4. Create and Execute Write Transactio

VHDL TutorialsVerifying a Slave DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3339April 2014handle_write_resp_readyThe handle write response

Mentor Verification IP AE AXI4-Lite User Guide, V10.334SystemVerilog API OverviewAccess Transaction RecordApril 2014get*_transaction(), get*_phase(),

Mentor Verification IP AE AXI4-Lite User Guide, V10.3340VHDL TutorialsVerifying a Master DUTApril 2014m_rd_data_phase_ready_delay variable. The whole

VHDL TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3341April 2014BFM Slave Test ProgramThe slave test program is

Mentor Verification IP AE AXI4-Lite User Guide, V10.3342VHDL TutorialsVerifying a Master DUTApril 2014do_byte_read()The do_byte_read() procedure reads

VHDL TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3343April 2014m_rd_addr_phase_ready_delayThe m_rd_addr_phase_r

Mentor Verification IP AE AXI4-Lite User Guide, V10.3344VHDL TutorialsVerifying a Master DUTApril 2014set_read_data_valid_delay()The set_read_data_val

VHDL TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3345April 2014The Advanced Slave API is capable of handling pi

Mentor Verification IP AE AXI4-Lite User Guide, V10.3346VHDL TutorialsVerifying a Master DUTApril 2014The maximum number of outstanding read transacti

VHDL TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3347April 2014variable is previously defined to hold the trans

Mentor Verification IP AE AXI4-Lite User Guide, V10.3348VHDL TutorialsVerifying a Master DUTApril 2014process_writeThe process_write process works in

VHDL TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3349April 2014Example 11-16. handle_write-- handle_write : wri

SystemVerilog API OverviewOperational Transaction FieldsMentor Verification IP AE AXI4-Lite User Guide, V10.335April 2014// Define a variable prot_val

Mentor Verification IP AE AXI4-Lite User Guide, V10.3350VHDL TutorialsVerifying a Master DUTApril 2014Example 11-17. handle_response-- handle_response

VHDL TutorialsVerifying a Master DUTMentor Verification IP AE AXI4-Lite User Guide, V10.3351April 2014Example 11-18. handle_write_addr_ready-- handle_

Mentor Verification IP AE AXI4-Lite User Guide, V10.3352VHDL TutorialsVerifying a Master DUTApril 2014

Mentor Verification IP AE AXI4-Lite User Guide, V10.3353April 2014Chapter 12Getting Started with Qsys and the BFMsNoteA license is required to access

Mentor Verification IP AE AXI4-Lite User Guide, V10.3354Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIApril 20142. U

Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIMentor Verification IP AE AXI4-Lite User Guide, V10.3355April 2014sele

Mentor Verification IP AE AXI4-Lite User Guide, V10.3356Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIApril 2014Runn

Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIMentor Verification IP AE AXI4-Lite User Guide, V10.3357April 20143. Q

Mentor Verification IP AE AXI4-Lite User Guide, V10.3358Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIApril 20144. C

Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIMentor Verification IP AE AXI4-Lite User Guide, V10.3359April 2014c. C

Mentor Verification IP AE AXI4-Lite User Guide, V10.336SystemVerilog API OverviewOperational Transaction FieldsApril 2014You can configure this behavi

Mentor Verification IP AE AXI4-Lite User Guide, V10.3360Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIApril 2014• “M

Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIMentor Verification IP AE AXI4-Lite User Guide, V10.3361April 2014The

Mentor Verification IP AE AXI4-Lite User Guide, V10.3362Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIApril 2014Note

Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIMentor Verification IP AE AXI4-Lite User Guide, V10.3363April 2014$env

Mentor Verification IP AE AXI4-Lite User Guide, V10.3364Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIApril 2014If t

Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIMentor Verification IP AE AXI4-Lite User Guide, V10.3365April 2014Note

Mentor Verification IP AE AXI4-Lite User Guide, V10.3366Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIApril 2014The

Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIMentor Verification IP AE AXI4-Lite User Guide, V10.3367April 2014Syno

Mentor Verification IP AE AXI4-Lite User Guide, V10.3368Getting Started with Qsys and the BFMsSetting Up Simulation from the Windows GUIApril 2014The

Mentor Verification IP AE AXI4-Lite User Guide, V10.3369April 2014Appendix AAXI4-Lite AssertionsThe AXI4-Lite master, slave, and monitor BFMs all supp

SystemVerilog API OverviewOperational Transaction FieldsMentor Verification IP AE AXI4-Lite User Guide, V10.337April 2014VALID Signal Delay Transactio

Mentor Verification IP AE AXI4-Lite User Guide, V10.3370AXI4-Lite AssertionsApril 2014AXI4-60008AXI4_ARCACHE_CHANGED_BEFORE_ARREADYThe value of ARCACH

AXI4-Lite AssertionsMentor Verification IP AE AXI4-Lite User Guide, V10.3371April 2014AXI4-60022AXI4_ARREGION_CHANGED_BEFORE_ARREADYThe value of ARREG

Mentor Verification IP AE AXI4-Lite User Guide, V10.3372AXI4-Lite AssertionsApril 2014AXI4-60037AXI4_AWCACHE_CHANGED_BEFORE_AWREADYThe value of AWCACH

AXI4-Lite AssertionsMentor Verification IP AE AXI4-Lite User Guide, V10.3373April 2014AXI4-60051AXI4_AWREGION_CHANGED_BEFORE_AWREADYThe value of AWREG

Mentor Verification IP AE AXI4-Lite User Guide, V10.3374AXI4-Lite AssertionsApril 2014AXI4-60066AXI4_BRESP_UNKN BRESP has an X value/BRESP has a Z val

AXI4-Lite AssertionsMentor Verification IP AE AXI4-Lite User Guide, V10.3375April 2014AXI4-60082AXI4_EXCLUSIVE_WR_LENGTH_NOT_SAME_AS_RDExclusive write

Mentor Verification IP AE AXI4-Lite User Guide, V10.3376AXI4-Lite AssertionsApril 2014AXI4-60095AXI4_EX_WRITE_OKAY_RESP_EXPECTED_EXOKAYAn AXI4_OKAY re

AXI4-Lite AssertionsMentor Verification IP AE AXI4-Lite User Guide, V10.3377April 2014AXI4-60109AXI4_INVALID_WRITE_STROBES_ON_UNALIGNED_WRITE_TRANSFER

Mentor Verification IP AE AXI4-Lite User Guide, V10.3378AXI4-Lite AssertionsApril 2014AXI4-60123AXI4_READ_ALLOCATE_WHEN_NON_MODIFIABLE_8The RA of the

AXI4-Lite AssertionsMentor Verification IP AE AXI4-Lite User Guide, V10.3379April 2014AXI4-60139AXI4_RID_UNKN RID has an X value/RID has a Z value.AXI

Mentor Verification IP AE AXI4-Lite User Guide, V10.338SystemVerilog API OverviewOperational Transaction FieldsApril 2014

Mentor Verification IP AE AXI4-Lite User Guide, V10.3380AXI4-Lite AssertionsApril 2014AXI4-60156AXI4_UNALIGNED_ADDR_FOR_WRAPPING_WRITE_BURSTWrapping b

AXI4-Lite AssertionsMentor Verification IP AE AXI4-Lite User Guide, V10.3381April 2014AXI4-60170AXI4_WRITE_STROBES_LENGTH_VIOLATIONThe size of the wri

Mentor Verification IP AE AXI4-Lite User Guide, V10.3382AXI4-Lite AssertionsApril 2014AXI4-60186AXI4_WUSER_UNKN WUSER has an X value/WUSER has a Z val

AXI4-Lite AssertionsMentor Verification IP AE AXI4-Lite User Guide, V10.3383April 2014AXI4-60205AXI4_EXCLUSIVE_WRITE_BYTES_TRANSFER_NOT_POWER_OF_2Numb

Mentor Verification IP AE AXI4-Lite User Guide, V10.3384AXI4-Lite AssertionsApril 2014

Mentor Verification IP AE AXI4-Lite User Guide, V10.3385April 2014Appendix BSystemVerilog Test ProgramsSystemVerilog AXI4-Lite Master BFM Test Program

Mentor Verification IP AE AXI4-Lite User Guide, V10.3386SystemVerilog Test ProgramsSystemVerilog AXI4-Lite Master BFM Test ProgramApril 2014 ////////

SystemVerilog Test ProgramsSystemVerilog AXI4-Lite Master BFM Test ProgramMentor Verification IP AE AXI4-Lite User Guide, V10.3387April 2014 // Wri

Mentor Verification IP AE AXI4-Lite User Guide, V10.3388SystemVerilog Test ProgramsSystemVerilog AXI4-Lite Master BFM Test ProgramApril 2014 bfm.ex

SystemVerilog Test ProgramsSystemVerilog AXI4-Lite Master BFM Test ProgramMentor Verification IP AE AXI4-Lite User Guide, V10.3389April 2014 fo

Mentor Verification IP AE AXI4-Lite User Guide, V10.339April 2014Chapter 3SystemVerilog Master BFMThis chapter provides information about the SystemVe

Mentor Verification IP AE AXI4-Lite User Guide, V10.3390SystemVerilog Test ProgramsSystemVerilog AXI4-Lite Slave BFM Test ProgramApril 2014 see

SystemVerilog Test ProgramsSystemVerilog AXI4-Lite Slave BFM Test ProgramMentor Verification IP AE AXI4-Lite User Guide, V10.3391April 2014 // AXI4_V

Mentor Verification IP AE AXI4-Lite User Guide, V10.3392SystemVerilog Test ProgramsSystemVerilog AXI4-Lite Slave BFM Test ProgramApril 2014 /////////

SystemVerilog Test ProgramsSystemVerilog AXI4-Lite Slave BFM Test ProgramMentor Verification IP AE AXI4-Lite User Guide, V10.3393April 2014 for(int

Mentor Verification IP AE AXI4-Lite User Guide, V10.3394SystemVerilog Test ProgramsSystemVerilog AXI4-Lite Slave BFM Test ProgramApril 2014 forever

SystemVerilog Test ProgramsSystemVerilog AXI4-Lite Slave BFM Test ProgramMentor Verification IP AE AXI4-Lite User Guide, V10.3395April 2014 if (t

Mentor Verification IP AE AXI4-Lite User Guide, V10.3396SystemVerilog Test ProgramsSystemVerilog AXI4-Lite Slave BFM Test ProgramApril 2014 joi

Mentor Verification IP AE AXI4-Lite User Guide, V10.3397April 2014Appendix CVHDL Test ProgramsThis appendix contains VHDL test programs, one for the m

Mentor Verification IP AE AXI4-Lite User Guide, V10.3398VHDL Test ProgramsAXI4-Lite VHDL Master BFM Test ProgramApril 2014 --////////////////////////

VHDL Test ProgramsAXI4-Lite VHDL Master BFM Test ProgramMentor Verification IP AE AXI4-Lite User Guide, V10.3399April 2014 report "master_test

Table of Contents4April 2014Mentor Verification IP AE AXI4-Lite User Guide, V10.3Master BFM Configuration . . . . . . . . . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.340SystemVerilog Master BFMMaster BFM ConfigurationApril 2014Master BFM ConfigurationA master BFM

Mentor Verification IP AE AXI4-Lite User Guide, V10.3400VHDL Test ProgramsAXI4-Lite VHDL Master BFM Test ProgramApril 2014 wait; end process; --

VHDL Test ProgramsAXI4-Lite VHDL Slave BFM Test ProgramMentor Verification IP AE AXI4-Lite User Guide, V10.3401April 2014end master_test_program_a;AXI

Mentor Verification IP AE AXI4-Lite User Guide, V10.3402VHDL Test ProgramsAXI4-Lite VHDL Slave BFM Test ProgramApril 2014 type memory_t is array (0 t

VHDL Test ProgramsAXI4-Lite VHDL Slave BFM Test ProgramMentor Verification IP AE AXI4-Lite User Guide, V10.3403April 2014 begin set_write_response

Mentor Verification IP AE AXI4-Lite User Guide, V10.3404VHDL Test ProgramsAXI4-Lite VHDL Slave BFM Test ProgramApril 2014 get_write_addr_data(wri

VHDL Test ProgramsAXI4-Lite VHDL Slave BFM Test ProgramMentor Verification IP AE AXI4-Lite User Guide, V10.3405April 2014 variable data : std_logic

Mentor Verification IP AE AXI4-Lite User Guide, V10.3406VHDL Test ProgramsAXI4-Lite VHDL Slave BFM Test ProgramApril 2014 -- Assertion and de-asserti

Third-Party Software for Mentor Verification IP Altera EditionThis section provides information on open source and third-party software that may be in

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End-User License AgreementThe latest version of the End-User License Agreement is available on-line at:www.mentor.com/eulaEND-USER LICENSE AGREEMENT (

SystemVerilog Master BFMMaster BFM ConfigurationMentor Verification IP AE AXI4-Lite User Guide, V10.341April 2014A master BFM has configuration fields

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Mentor Verification IP AE AXI4-Lite User Guide, V10.342SystemVerilog Master BFMMaster AssertionsApril 20141. Refer to Master Timing and Events for det

SystemVerilog Master BFMSystemVerilog Master APIMentor Verification IP AE AXI4-Lite User Guide, V10.343April 2014NoteThe built-in BFM assertions are i

Mentor Verification IP AE AXI4-Lite User Guide, V10.344SystemVerilog Master BFMset_config()April 2014set_config()This function sets the configuration

SystemVerilog Master BFMget_config()Mentor Verification IP AE AXI4-Lite User Guide, V10.345April 2014get_config()This function gets the configuration

Mentor Verification IP AE AXI4-Lite User Guide, V10.346SystemVerilog Master BFMcreate_write_transaction()April 2014create_write_transaction()This nonb

SystemVerilog Master BFMcreate_write_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.347April 2014Example// Create a write transactio

Mentor Verification IP AE AXI4-Lite User Guide, V10.348SystemVerilog Master BFMcreate_read_transaction()April 2014create_read_transaction()This nonblo

SystemVerilog Master BFMexecute_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.349April 2014execute_transaction()This task executes

Table of ContentsMentor Verification IP AE AXI4-Lite User Guide, V10.35April 2014get_write_addr_data(). . . . . . . . . . . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.350SystemVerilog Master BFMexecute_write_addr_phase()April 2014execute_write_addr_phase()This task

SystemVerilog Master BFMexecute_read_addr_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.351April 2014execute_read_addr_phase()This task e

Mentor Verification IP AE AXI4-Lite User Guide, V10.352SystemVerilog Master BFMexecute_write_data_phase()April 2014execute_write_data_phase()This task

SystemVerilog Master BFMget_read_data_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.353April 2014get_read_data_phase()This blocking task

Mentor Verification IP AE AXI4-Lite User Guide, V10.354SystemVerilog Master BFMget_write_response_phase()April 2014get_write_response_phase()This bloc

SystemVerilog Master BFMget_read_addr_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.355April 2014get_read_addr_ready()This blocking task

Mentor Verification IP AE AXI4-Lite User Guide, V10.356SystemVerilog Master BFMget_read_data_cycle()April 2014get_read_data_cycle()This blocking task

SystemVerilog Master BFMget_write_addr_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.357April 2014get_write_addr_ready()This blocking ta

Mentor Verification IP AE AXI4-Lite User Guide, V10.358SystemVerilog Master BFMget_write_data_ready()April 2014get_write_data_ready()This blocking ta

SystemVerilog Master BFMget_write_response_cycle()Mentor Verification IP AE AXI4-Lite User Guide, V10.359April 2014get_write_response_cycle()This bloc

Table of Contents6April 2014Mentor Verification IP AE AXI4-Lite User Guide, V10.3Waiting Events. . . . . . . . . . . . . . . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.360SystemVerilog Master BFMexecute_read_data_ready()April 2014execute_read_data_ready()This task e

SystemVerilog Master BFMexecute_write_resp_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.361April 2014execute_write_resp_ready()This task

Mentor Verification IP AE AXI4-Lite User Guide, V10.362SystemVerilog Master BFMwait_on()April 2014wait_on()This blocking task waits for an event(s) on

Mentor Verification IP AE AXI4-Lite User Guide, V10.363April 2014Chapter 4SystemVerilog Slave BFMThis chapter describes the SystemVerilog slave BFM. E

Mentor Verification IP AE AXI4-Lite User Guide, V10.364SystemVerilog Slave BFMSlave BFM ConfigurationApril 2014Slave BFM ConfigurationThe slave BFM su

SystemVerilog Slave BFMSlave BFM ConfigurationMentor Verification IP AE AXI4-Lite User Guide, V10.365April 2014A slave BFM has configuration fields th

Mentor Verification IP AE AXI4-Lite User Guide, V10.366SystemVerilog Slave BFMSlave BFM ConfigurationApril 2014AXI4_CONFIG_MAX_LATENCY_RVALID_ASSERTIO

SystemVerilog Slave BFMSlave AssertionsMentor Verification IP AE AXI4-Lite User Guide, V10.367April 20141. Refer to Slave Timing and Events for detail

Mentor Verification IP AE AXI4-Lite User Guide, V10.368SystemVerilog Slave BFMSystemVerilog Slave APIApril 2014// Get the current value of the asserti

SystemVerilog Slave BFMset_config()Mentor Verification IP AE AXI4-Lite User Guide, V10.369April 2014set_config()This function sets the configuration o

Table of ContentsMentor Verification IP AE AXI4-Lite User Guide, V10.37April 2014get_data_ready_delay(). . . . . . . . . . . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.370SystemVerilog Slave BFMget_config()April 2014get_config()This function gets the configuration o

SystemVerilog Slave BFMcreate_slave_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.371April 2014create_slave_transaction()This nonbl

Mentor Verification IP AE AXI4-Lite User Guide, V10.372SystemVerilog Slave BFMcreate_slave_transaction()April 2014Example// Create a slave transaction

SystemVerilog Slave BFMexecute_read_data_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.373April 2014execute_read_data_phase()This task ex

Mentor Verification IP AE AXI4-Lite User Guide, V10.374SystemVerilog Slave BFMexecute_write_response_phase()April 2014execute_write_response_phase()Th

SystemVerilog Slave BFMget_write_addr_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.375April 2014get_write_addr_phase()NoteThis blocking

Mentor Verification IP AE AXI4-Lite User Guide, V10.376SystemVerilog Slave BFMget_read_addr_phase()April 2014get_read_addr_phase()This blocking task g

SystemVerilog Slave BFMget_write_data_phase()Mentor Verification IP AE AXI4-Lite User Guide, V10.377April 2014get_write_data_phase()This blocking task

Mentor Verification IP AE AXI4-Lite User Guide, V10.378SystemVerilog Slave BFMget_read_addr_cycle()April 2014get_read_addr_cycle()This blocking task w

SystemVerilog Slave BFMexecute_read_addr_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.379April 2014execute_read_addr_ready()This task ex

Table of Contents8April 2014Mentor Verification IP AE AXI4-Lite User Guide, V10.3set_gen_write_strobes() . . . . . . . . . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.380SystemVerilog Slave BFMget_read_data_ready()April 2014get_read_data_ready()This blocking task r

SystemVerilog Slave BFMget_write_addr_cycle()Mentor Verification IP AE AXI4-Lite User Guide, V10.381April 2014get_write_addr_cycle()This blocking task

Mentor Verification IP AE AXI4-Lite User Guide, V10.382SystemVerilog Slave BFMexecute_write_addr_ready()April 2014execute_write_addr_ready()This task

SystemVerilog Slave BFMget_write_data_cycle()Mentor Verification IP AE AXI4-Lite User Guide, V10.383April 2014get_write_data_cycle()This blocking tas

Mentor Verification IP AE AXI4-Lite User Guide, V10.384SystemVerilog Slave BFMexecute_write_data_ready()April 2014execute_write_data_ready()This task

SystemVerilog Slave BFMget_write_resp_ready()Mentor Verification IP AE AXI4-Lite User Guide, V10.385April 2014get_write_resp_ready()This blocking task

Mentor Verification IP AE AXI4-Lite User Guide, V10.386SystemVerilog Slave BFMwait_on()April 2014wait_on()This blocking task waits for an event on the

SystemVerilog Slave BFMHelper FunctionsMentor Verification IP AE AXI4-Lite User Guide, V10.387April 2014Helper FunctionsAMBA AXI protocols typically p

Mentor Verification IP AE AXI4-Lite User Guide, V10.388SystemVerilog Slave BFMget_read_addr()April 2014get_read_addr()This nonblocking function return

SystemVerilog Slave BFMset_read_data()Mentor Verification IP AE AXI4-Lite User Guide, V10.389April 2014set_read_data()This nonblocking function sets a

Table of ContentsMentor Verification IP AE AXI4-Lite User Guide, V10.39April 2014VHDL Monitor API. . . . . . . . . . . . . . . . . . . . . . . . . . .

Mentor Verification IP AE AXI4-Lite User Guide, V10.390SystemVerilog Slave BFMset_read_data()April 2014

Mentor Verification IP AE AXI4-Lite User Guide, V10.391April 2014Chapter 5SystemVerilog Monitor BFMThis chapter describes the SystemVerilog monitor BF

Mentor Verification IP AE AXI4-Lite User Guide, V10.392SystemVerilog Monitor BFMMonitor BFM ConfigurationApril 2014timeunit, or timeprecision declarat

SystemVerilog Monitor BFMMonitor BFM ConfigurationMentor Verification IP AE AXI4-Lite User Guide, V10.393April 2014A monitor BFM has configuration fie

Mentor Verification IP AE AXI4-Lite User Guide, V10.394SystemVerilog Monitor BFMMonitor BFM ConfigurationApril 2014AXI4_CONFIG_BURST_TIMEOUT_FACTOR Th

SystemVerilog Monitor BFMMonitor AssertionsMentor Verification IP AE AXI4-Lite User Guide, V10.395April 20141. Refer to Monitor Timing and Events for

Mentor Verification IP AE AXI4-Lite User Guide, V10.396SystemVerilog Monitor BFMSystemVerilog Monitor APIApril 2014To re-enable the AXI4_AWADDR_CHANGE

SystemVerilog Monitor BFMget_config()Mentor Verification IP AE AXI4-Lite User Guide, V10.397April 2014get_config()This function gets the configuration

Mentor Verification IP AE AXI4-Lite User Guide, V10.398SystemVerilog Monitor BFMcreate_monitor_transaction()April 2014create_monitor_transaction()This

SystemVerilog Monitor BFMget_rw_transaction()Mentor Verification IP AE AXI4-Lite User Guide, V10.399April 2014get_rw_transaction()This blocking task g