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9–2 Quartus II Version 3.0 Altera Corporation
Introduction High-Speed Development Kit, Stratix GX Edition User Guide
Figure 9–1 shows the application overview. A separate statistics module
implements 32-bit counters for received traffic statistics (e.g., packets
received, errors received). You can access these statistics through an
RS-232 connection that is served by an embedded Nios processor and a
small control application running on the processor. A normal RS-232
terminal program is sufficient to access the port. The RS-232 connection is
optional, that is, if it is not connected, the loopback operation is fully
functional as no specific configuration application needs to run on the
Nios processor.
The on-board Stratix GX LEDs indicate fault and traffic conditions.
Figure 9–1. Application Overview
1 The demonstration assumes that the optional XPAK
module is connected to the board and the 156.25 MHz clock
oscillator is enabled.
CRC append on
transmit
Enabled Upon transmission, a new CRC is calculated and appended to each
frame. If the received frame had an error, the frame will be
transmitted with an error indication (XGMII error control code).
Padding remove Enabled If padded frames are received, the padding is removed. Upon
transmission the transmitter adds new padding.
Table 9–1. 10G Ethernet MAC Core Configuration (Part 2 of 2)
Parameter Setting Notes
Xpack
Module
10-Gigabit
Ethernet Tester
10GbE
MAC
Statistics
Module
Nios
RS-232
XAUI
Altera Board
Stratix GX Device
- High-Speed Development Kit 1
- Stratix GX Edition 1
- User Guide 1
- Contents 3
- Section III. Diagnostic Tests 4
- About this User Guide 7
- Typographic 8
- Conventions 8
- Section I. Introduction 9
- Preliminary 10
- 1. About this Kit 11
- Features 12
- Documentation 13
- July 2003 14
- Section II. Getting Started 15
- 2. Before You Begin 17
- Inspect the 18
- Software 18
- Requirements 18
- Set Up Licensing 20
- Next Steps 20
- 3. Board Setup 23
- Feature Description 24
- Required 25
- Hardware 25
- Power Up the 25
- Board & View 25
- 4. Run the Preloaded 29
- Diagnostic Tests 29
- Required Hardware 30
- Test Setup 30
- Run the User I/O Test 31
- Stratix GX DDR 33
- Interface 33
- Stratix GX HM 36
- Zd SPI-4.2 36
- Loopback 36
- Zd XCVR 38
- ● LED5 is the error signal 39
- Stratix GX SFP 40
- XCVR Loopback 40
- Stratix GX XCVR 42
- Eye Diagram 42
- Section III. Diagnostic 43
- 5. Perform the Production 45
- Figure 5–9 50
- Perform the 54
- Standard Tests 54
- Stratix GX-to-Stratix Bridge 56
- ● LED4 is turned off 60
- XCVR) (GX40 Device Only) 65
- Nios-Based 66
- Nios PROTO1 IO) 73
- Finishing Test & 79
- Breakdown 79
- 6. Troubleshooting 81
- 7. Diagnostic Test Details 83
- Stratix GX 91
- Stratix GX HM-Zd (SPI-4.2) 94
- Stratix GX SMA DPA 97
- Stratix GX SMA XCVR 101
- Stratix GX HM-Zd XCVR 105
- Stratix GX SFP XCVR 108
- Stratix GX XPAK XCVR 111
- Stratix GX HSSDC2 XCVR 114
- Nios Designs 117
- Stratix GX Device 118
- Stratix Nios PMC Test 120
- Section IV 127
- Demonstrations 127
- 8. Stratix GX SPI-4.2 129
- Demonstration with 10-Port 129
- Gigabit Ethernet MAC 129
- Intel Board (IXD1110) 131
- Altera Board 131
- 9. 10-Gigabit Ethernet MAC 135
- Demonstration 135
- Altera Board 136
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