Altera HyperTransport MegaCore Function Instrukcja Użytkownika Strona 41
- Strona / 76
- Spis treści
- BOOKMARKI
Oceniono. / 5. Na podstawie oceny klientów
Chapter 3: Specifications 3–15
HyperTransport MegaCore Function Specification
© November 2009 Altera Corporation HyperTransport MegaCore Function User Guide
Preliminary
The local application interface uses an Altera Atlantic interface to transfer data to the
local-side application. The local application interface has the following signal groups:
■ Rx non-posted command/data interface
■ Rx posted command/data interface
■ Rx response command/data interface
■ Tx non-posted command/data interface
■ Tx posted command/data interface
■ Tx response command/data interface
■ CSR interface
■ System signals
The following sections describe these signal groups.
f The local application interfaces to the Rx and Tx command/data buffers using the
Altera Atlantic interface. For a detailed description of the Atlantic interface, refer to FS
13: Atlantic Interface.
Table 3–1 offers an overview of the Atlantic interface information in FS 13: Atlantic
Interface that is relevant for the HyperTransport MegaCore.
The Atlantic interface specification defines the dat signal bus to be in big-endian
format. Because HT uses little-endian format, the HyperTransport MegaCore function
uses a little-endian format across the Atlantic interface. This implementation requires
a different interpretation of the Atlantic mty signals, as described in the mty signal
descriptions in the remainder of this section.
Table 3–1. Atlantic Interface Support
Interface
Atlantic
Type
Unused
Signals Exceptions
Rx non-posted command/data interface.
Rx posted command/data interface.
Rx response command/data interface.
Slave Source err
par
adr
Packets are organized in the form of command
followed by data. The Dat signals hold command and
data information. When SOP is asserted, the
information driven on the Dat signal is command
information.
Side-band signals provide additional information.
Tx non-posted command/data buffer
signals
Tx posted command/data signals.
Tx response command/data signals
Slave Sink err
par
adr
The Rjct signal indicates when the write was rejected.
This signal is a side-band signal in addition to the
Atlantic signals.
CSR signals Not Atlantic
System signals Not Atlantic
- User Guide 1
- UG-MCHYPRTRNS-1.12 2
- Contents 3
- Appendix C. Example Design 4
- Additional Information 4
- Release Information 5
- Device Family Support 5
- Introduction 6
- Features 6
- Performance 7
- Notes to Table 1–4: 8
- Notes to Table 1–5: 8
- 2. Getting Started 9
- MegaCore Function Walkthrough 10
- Step 1: Parameterize 13
- Step 2: Set Up Simulation 17
- Figure 2–9. Set Up Simulation 18
- Step 3: Generate 19
- Notes to Table 2–1: 20
- Compile the Design 21
- Simulate the Design 21
- Program a Device 22
- Set Up Licensing 23
- Example Quartus II Project 24
- ■ input_ht_vector.dat 25
- ■ output_ht_vector.dat 25
- ■ input_ui_vector.dat 25
- ■ output_ui_vector.dat 25
- About the Test Vectors 26
- 3. Specifications 27
- HT Systems 28
- HT Flow Control 29
- Physical Interface 30
- Protocol Interface 31
- End-Chain Handler 32
- Rx Claimed Buffers 32
- Tx Buffers 32
- Scheduler 32
- Clocking Options 33
- Shared Rx/Tx Clock 34
- Shared Ref/Tx Clock 34
- Chapter 3: Specifications 3–9 35
- Preliminary 35
- Shared Rx/Tx/Ref Clock 36
- Note to Figure 3–8: 37
- HT Link Rx Signals 42
- HT Link System Signals 42
- HT Link Tx Signals 42
- Notes to Table 3–6: 45
- Notes to Figure 3–10: 46
- Notes to Figure 3–11: 46
- Notes to Figure 3–12: 47
- Notes to Figure 3–13: 47
- Notes to Table 3–8: 51
- Addr[39:8] 52
- Notes to Figure 3–16: 53
- Notes to Figure 3–17: 53
- Notes to Figure 3–18: 54
- User Interface System Signals 55
- Using PLL Resets 55
- CSR Interface Signals 56
- CSR Module 57
- Notes to Table 3–13: 58
- Notes: to Table 3–16: 60
- A. Parameters 67
- Base Address Registers 68
- Advanced Settings 69
- A–4 Appendix A: Parameters 70
- Parameter Lists 70
- Guidelines 71
- C. Example Design 73
- General Description 74
- Typographic Conventions 76
Powiązane produkty i podręczniki dla Urządzenia pomiarowe Altera HyperTransport MegaCore Function
Urządzenia pomiarowe Altera High-Speed Development Kit, Stratix GX Edition Instrukcja Użytkownika
(140 strony)
(140 strony)
Urządzenia pomiarowe Altera Internal Memory (RAM and ROM) IP Core Instrukcja Użytkownika
(57 strony)
(57 strony)
Urządzenia pomiarowe Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Instrukcja Użytkownika
(196 strony)
(196 strony)
Urządzenia pomiarowe Altera Mentor Verification IP Altera Edition AMBA AXI4-Li Instrukcja Użytkownika
(413 strony)
(413 strony)
Urządzenia pomiarowe Altera Mentor Verification IP Altera Edition AMBA AXI4-St Instrukcja Użytkownika
(231 strony)
(231 strony)
Urządzenia pomiarowe Altera Mentor Verification IP Altera Edition AMBA AXI3/4T Instrukcja Użytkownika
(783 strony)
(783 strony)
Urządzenia pomiarowe Altera PCI Development Kit, Cyclone II Edition Getting St Instrukcja Użytkownika
(40 strony)
(40 strony)
© 2020, manymanuals.pl. Wszelkie prawa zastrzeżone. | 0.083 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Komentarze do niniejszej Instrukcji