Altera Partial Reconfiguration IP Core Instrukcja Użytkownika Pobierz pdf (Strona 25)

Figure 12: Configuring Corrupted .rbf

Sample Freeze Wrapper for Multiple PR Regions

The following Verilog HDL pseudocode shows an example of how to create a simple freeze wrapper for

two PR regions.

The same method can be applied to any number of PR regions.

// pseudocode for a simple freeze wrapper for two PR regions

module design_top (…);

// user selects region A or B to be PR’ed

input pr_region_A_or_B;

input pr_start;

assign freeze_A_w = pr_region_A_or_B ? pr_freeze_w : 1’b0;

assign freeze_B_w = pr_region_A_or_B ? 1’b0 : pr_freeze_w;

// freeze output of PR IP core

alt_pr_sv my_alt_pr (

.freeze (pr_freeze_w), // always stays low until user asserts pr_start

.pr_start (pr_start),

…

);

// Freeze wrapper for input signals of single PR region A

// Follow existing recommendations in the PR user guide for the details

freeze_region_A

UG-PARTRECON

2015.05.04

Sample Freeze Wrapper for Multiple PR Regions

Partial Reconfiguration IP Core

Altera Corporation

Send Feedback

1 2 ... 20 21 22 23 24 25 26 27

Brak uwag

Altera Partial Reconfiguration IP Core Instrukcja Użytkownika Strona 25