Altera PowerPlay Early Power Estimator Instrukcja Użytkownika Strona 24

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3–8 UG-FPGAPWRCAL-2.0 Altera Corporation
PowerPlay Early Power Estimator User Guide: Stratix, Stratix GX & Cyclone FPGAs October 2005
PowerPlay Early Power Estimator Input Values
Figure 3–7. Resource Usage Summary in Compilation Report
Figure 3–8. Logic Elements (LEs) Section in the Stratix PowerPlay Early Power Estimator
Digital Signal Processing Blocks
The Digital Signal Processing (DSP) section is only found in the Stratix
and Stratix GX PowerPlay early power estimator. Stratix and Stratix GX
devices have dedicated DSP blocks, which have high-speed parallel
processing capabilities that are optimized for DSP applications. DSP
blocks are ideal for implementing DSP applications that need high data
throughput.
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