Altera Quartus II Scripting Instrukcja Użytkownika Pobierz pdf (Strona 139)

Chapter 3: Tcl Packages & Commands 3–9

© July 2013 Altera Corporation Quartus II Scripting Reference Manual

save_report_database report 3–266

set_active_clocks sdc_ext 3–336

set_annotated_delay sdc_ext 3–337

set_batch_mode chip_planner 3–78

set_clock_groups sdc 3–305

set_clock_latency sdc 3–306

set_clock_latency timing_assignment 3–490

set_clock_uncertainty sdc 3–308

set_clock_uncertainty timing_assignment 3–492

set_current_revision project 3–235

set_disable_timing sdc 3–309

set_false_path sdc 3–310

set_global_assignment project 3–236

set_input_delay sdc 3–312

set_input_delay timing_assignment 3–494

set_input_transition sdc 3–314

set_instance_assignment project 3–237

set_io_assignment project 3–239

set_location_assignment project 3–240

set_logiclock incremental_compilation 3–120

set_logiclock_contents incremental_compilation 3–121

set_max_delay sdc 3–315

set_max_skew sdc_ext 3–338

set_min_delay sdc 3–317

set_multicycle_assignment timing_assignment 3–496

set_multicycle_path sdc 3–319

set_net_delay sdc_ext 3–340

set_node_info chip_planner 3–79

set_operating_conditions sta 3–462

set_output_delay sdc 3–321

set_output_delay timing_assignment 3–498

set_parameter project 3–241

set_partition incremental_compilation 3–123

set_port_info chip_planner 3–80

set_power_file_assignment project 3–243

set_scc_mode sdc_ext 3–341

set_simulation_clock simulator 3–371

set_tile_power_setting chip_planner 3–81

set_time_format sdc_ext 3–342

Command Name Package Page

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