Altera DE2-70 podręczniki

Altera DE2-70 Instrukcja Użytkownika (10 strony)

Marka: Altera | Kategoria: Networking | Rozmiar: 0.27 MB |

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DE2-70 Package

1

1.3 Getting Help

3

Altera DE2-70 Board

4

Cyclone II 2C70 FPGA

6

Audio CODEC

8

VGA output

8

10/100 Ethernet controller

8

USB Host/Slave controller

8

Serial ports

9

IrDA transceiver

9

Two 40-pin expansion headers

9

DE2-70 User Manual

10

Altera DE2-70 Instrukcja Użytkownika (143 strony)

Marka: Altera | Kategoria: Networking | Rozmiar: 12.25 MB |

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EECS 452 – Lecture 5

1

Lecture overview

2

Free eBook

3

Full Custom, ASIC, FPGA

4

FPGA organization

6

Coming down the road (at us)

8

Cyclone II FPGA layout

10

Cyclone II logic element

11

Programmable interconnections

12

Clock distribution network

13

DE2-70 RAM

14

(inc. parity)

15

(not avail. true dual)

15

Multipliers

16

Advantages of an FPGA

17

ASICs, FPGAs’ competition

18

Who makes FPGAs?

19

The Terasic/Altera DE2-70

20

DE2-70 features

21

The DE2-70 power on default

22

DE2-70 reference materials

23

Deﬁnitive resources

24

Learning SystemVerilog

29

Comments about standards

32

Verilog DIY learning links

33

Some Quartus II resources

35

Processing a design

36

Quartus II ﬁle extensions

37

.qsf ﬁle comments

38

DE2-70 .qsf ﬁle snippet

39

DE0-Nano .qsf ﬁle snippet

40

Selecting the I/O standard

41

.sdc ﬁle comments

42

From my .sdc ﬁle

43

Dealing with a pin conﬂict

44

Creating a project

45

Specifying the FPGA (DE2-70)

46

Almost ready to go

47

It remains to . .

48

Quartus II screen shot

49

The warning windows

50

Comments on module structure

52

An Altera example

54

Altera’s addsub.v example

55

Verilog’s numbers

57

Verilog’s base logic elements

58

Full Adder

59

Full Adder — Structural

60

Verilog’s operators

61

Verilog’s operators part 1

62

Verilog’s operators part 2

63

From IEEE Standard 1800-2009

64

SystemVerilog’s data types

65

Full adder — Behavioral

66

Full adder test

68

Syntax for looping statements

72

For loop example

73

For loop example result

74

Lab exercise 3

75

CODEC device used on DE2-70

77

The WM8731, what and how

78

DE2-70 schematic, CODEC

79

DE2-70 CODEC pin assignments

80

Need a fast D/A?

81

ALTERA DE2-70

82

Implementing a DDS sine table

83

Recompiled and ran

86

Using QuartusII Megafunctions

87

Megafunctions continued

88

Specifying a ROM

89

More .mif information

91

From Altera documentation

94

Overﬂow lecture material

95

The FPGA Blinky variations

96

Blinking an LED

97

Blinky comments

98

Blinky using registers

99

Blinky_D comments

100

Blinky_state part 1

101

Blinky_state part 2

102

Blinky_state comments

103

Loading Blinky into the FPGA

104

Making Blinky the default

105

Restoring the default default

106

The FPGA breakout board

107

Bit-serial data transfers

110

Clock domain crossings

111

CDC references

112

Understanding clock domain

113

Metastability cause

114

An answer is ?

116

The SPI protocol

118

SPI timing example

119

My DIY SPI timing example

120

The I2S protocol

121

I2S timing example

122

The I2C protocol

123

The I2C connection and timing

124

The UART protocol

125

The UART frame

126

The FT232R UART/USB breakout

127

Bit-serial comments

128

Synchronizer module

129

The Digilent PMod-DA2 module

130

The DAC121S101 D/A

131

How to make the D/A work

132

Starting simple with the D/A

133

The Digilent PMod-AD1 module

134

The ADCS7476 A/D

135

Comments

136

From the Amazon web site

137

FYI: Terasic DE0-Nano

138

DE0–Nano features

139

A low cost competitor

141

Starting a personal library

143

Altera DE2-70 Instrukcja Użytkownika (72 strony)

Marka: Altera | Kategoria: Networking | Rozmiar: 6.14 MB |

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Altera DE2 Board

1

CONTENTS

2

DE2 Package

4

1.2 The DE2 Board Assembly

5

1.3 Getting Help

6

Cyclone II 2C35 FPGA

9

DE2 User Manual

10

Audio CODEC

11

VGA output

11

NTSC/PAL TV decoder circuit

11

10/100 Ethernet controller

11

USB Host/Slave controller

11

2.3 Power-up the DE2 Board

12

DE2 Control Panel

14

3.4 Flash Memory Programmer

19

3.7 VGA Display Control

23

Using the DE2 Board

27

4.4 Clock Inputs

35

4.5 Using the LCD Module

36

4.7 Using VGA

40

4.9 RS-232 Serial Port

45

4.10 PS/2 Serial Port

45

4.12 TV Decoder

47

4.15 Using IrDA

51

4.16 Using SDRAM/SRAM/Flash

52

Chapter 5

57

5.2 TV Box Demonstration

58

5.3 USB Paintbrush

60

5.4 USB Device

62

5.5 A Karaoke Machine

64

5.7 SD Card Music Player

67

Altera DE2-70 Dokumentacja (35 strony)

Marka: Altera | Kategoria: Networking | Rozmiar: 1.08 MB |

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FPGA Development Kit

1

ACKNOWLEDGEMENT

3

ABSTRACT

5

INTRODUCTION

6

Introduction:

7

Quartus II

8

SOPC Builder

11

Altera Debug Client

11

LITERATURE REVIEW

13

Literature Review:

14

3.1 Nios II System:

16

3.2 Design Flow:

18

board

21

3.6 Altera debug client:

28

3.6.2 Running the program:

30

RESULT and DISCUSSIONS

31

Result and Discussions:

32

References

33

Altera DE2-70 Instrukcja Użytkownika (93 strony)

Marka: Altera | Kategoria: Networking | Rozmiar: 4.22 MB |

Angielski

Spis treści

Altera DE2-70 Board

1

CONTENTS

2

DE2-70 Package

4

1.3 Getting Help

6

Cyclone II 2C70 FPGA

9

DE2-70 User Manual

10

Audio CODEC

11

VGA output

11

10/100 Ethernet controller

11

USB Host/Slave controller

11

Serial ports

12

IrDA transceiver

12

Two 40-pin expansion headers

12

DE2-70 Control Panel

14

3.3 Switches and Buttons

18

3.5 USB Monitoring

21

3.6 PS2 Device

22

3.7 SD CARD

23

DE2-70 Video Utility

28

4.2 VGA Display

29

4.3 Video Capture

30

System Interconnect Fabric

32

Using the DE2-70 Board

33

5.4 Clock Circuitry

41

5.5 Using the LCD Module

43

5.7 Using VGA

48

5.9 RS-232 Serial Port

52

5.10 PS/2 Serial Port

52

5.12 TV Decoder

55

5.15 Using IrDA

59

5.16 Using SDRAM/SRAM/Flash

60

Chapter 6

69

6.2 TV Box Demonstration

70

PIP_Control

74

TV_to_VGA

74

VGA(LCD/CRT)Monitor

74

6.4 USB Paintbrush

75

6.5 USB Device

77

6.6 A Karaoke Machine

79

6.8 SD Card Music Player

83

Appendix

93

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