Altera 100G Interlaken MegaCore Function Instrukcja Użytkownika Pobierz pdf (Strona 48)

Control Word Reset Calendar Bit (bit [56]) In-Band Flow Control Bits (bits [55:40])

Second 0 16'b0010001000100010 (16'h2222)

Third 0 16'b0011001100110011 (16'h3333)

Fourth 0 16'b0100010001000100 (16'h4444)

For details of the control word format, refer to the Interlaken Protocol Specification, Revision 1.2.

The 100G Interlaken IP Core supports itx_calendar widths of 1, 2, 4, 8, and 16 16-bit calendar pages.

You configure the width in the 100G Interlaken IP Core parameter editor.

By convention, in a standard case, each calendar bit corresponds to a single data channel. However, the

100G Interlaken IP Core assumes no default usage. You must map the calendar bits to channels or link

status according to your specific application needs. For example, if your design has 64 physical channels,

but only 16 priority groups, you can use a single calendar page and map each calendar bit to four physical

channels. As another example, for a different application, you can use additional calendar bits to pass

quality-of-service related information to the Interlaken link partner.

If your application flow-controls a channel, you are responsible for dropping the relevant packet. Altera

supports the transfer of the itx_calendar values you provide without examining the data that is affected

by in-band flow control of the Interlaken link.

Related Information

• 100G Interlaken IP Core Back-Pressured Packet Transfer Example on page 4-13

Example of in-band calendar bits usage on the TX user data transfer interface.

• Interlaken Protocol Specification, Revision 1.2

100G Interlaken IP Core Transmit Path Blocks

Figure 4-9: 100G Interlaken IP Core Transmit Path

itx_chan[7:0]

itx_num_valid[7:0]

itx_sob[1:0]

itx_eob

itx_sop[1:0]

itx_eopbits[3:0]

itx_din_words[511:0]

itx_calendar[16 x n - 1:0]

Transceiver Blocks

PCS

PMA

MAC

Transmit

Buffer

tx_usr_clk

tx_mac_clk

clk_tx_common

tx_pin[m - 1:0]

itx_ready

The 100G Interlaken IP core transmit data path has the following four main functional blocks:

100G Interlaken IP Core TX Transmit Buffer on page 4-19

4-18

100G Interlaken IP Core Transmit Path Blocks

UG-01128

2015.05.04

Altera Corporation

Functional Description

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