Altera Arria V GT FPGA Development Board Instrukcja Użytkownika Pobierz pdf (Strona 43)

Chapter 2: Board Components 2–33

Components and Interfaces

December 2014 Altera Corporation Arria V GT FPGA Development Board

Reference Manual

Table 2–23 summarizes the SDI video input interface pin assignments, signal names,

and functions.

Components and Interfaces

This section describes the development board's communication ports and interface

cards relative to the Arria V GT FPGA. The development board supports the

following communication ports:

■ PCI Express

■ 10/100/1000 Ethernet

■ HSMC

■ SFP+ modules

■ FMC connector

■ Bull’s Eye connector

PCI Express

The Arria V GT FPGA development board is designed to fit entirely into a PC

motherboard with a ×8 PCI Express slot that can accommodate a full height long form

factor add-in card. This interface uses the Arria V GT FPGA's PCI Express hard IP

block, saving logic resources for the user logic application. The PCI express edge

connector has a presence detect feature to allow the motherboard to determine if a

card is installed.

f For more information on using the PCI Express hard IP block, refer to the PCI Express

Compiler User Guide.

The PCI Express interface supports auto-negotiating channel width from ×1 to ×4 to

×8 by using Altera's PCIe MegaCore IP. You can also configure this board to a ×1, ×4,

or ×8 interface through a DIP switch that connects the

PRSNTn

pins for each bus width.

The PCI Express edge connector has a connection speed of 2.5 Gbps/lane for a

maximum of 20 Gbps full-duplex (Gen1) or 5.0 Gbps/lane for a maximum of 40 Gbps

full-duplex (Gen2).

Table 2–23. SDI Video Input Interface Pin Assignments, Schematic Signal Names, and Functions

Board Reference

(U23)

Schematic

Signal Name

Arria V GT FPGA

Pin Number

I/O Standard Description

SDI_A_EQIN_P1

— 3.3-V SDI video cable equalizer input P

SDI_A_EQIN_N1

— 3.3-V SDI video cable equalizer input N

SDI_A_RX_BYPASS

P19 2.5-V Equalizer bypass enable

SDI_A_RX_P

AJ1 1.4-V PCML SDI video output P

SDI_A_RX_N

AJ2 1.4-V PCML SDI video output N

SDI_A_RX_EN

AK34 2.5-V Device enable

SDI_A_RX_CDN

—3.3-V

SDI video cable equalizer input carrier

detect output to LED

1 2 ... 38 39 40 41 42 43 44 45 46 47 48 ... 85 86

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