Altera Stratix II GX EP2SGX90 Transceiver Signal Integrit Instrukcja Użytkownika Pobierz pdf (Strona 16)

2–6 Reference Manual Altera Corporation

Stratix II GX EP2SGX90 Transceiver Signal Integrity Development Board May 2006

Featured Device

Featured

Device

The Transceiver SI Development Kit, Stratix II GX Edition features the

EP2SGX90EF1152 FPGA (U20) in a 1152-pin FineLine BGA

(FBGA)

package. Table 2–2 lists some Stratix II GX device features.

f For additional information about Altera devices, go to

www.altera.com/products/devices.

Power Supply

Input DC power

jack

J16 16-V DC unregulated power source. 2–25

Input Power switch S10 Switches the board’s power on and off. 2–25

Input Optional

power input

connection

jacks

J17, J15,

J18, J19,

J20, J21

External power supply can be connected for high current

applications.

2–25

Input Jumper

header

J50 Jumper header for selecting between 1.5-V DC and

1.2-V DC supplied to the quad transceivers. Jumper pins 1

and 2 select 1.5-V output, and jumper pins 2 and 3 select

1.2-V output.

2–25

Output Temperature

sensor

U17 Performs thermal management, i.e., turning the cooling fan

on and off to regulate the FPGA temperature.

2–25

Table 2–1. Stratix II GX Transceiver SI Development Board Components & Interfaces (Part 3 of 3)

Type

Component/

Interface

Board

Reference

Description Page

Table 2–2. Stratix II GX Features

Architectural

Feature

Results

Altera’s third-

generation FPGA

with embedded

transceivers

● Provides a robust design solution for the most popular high-speed serial interfaces

● Provides optimum jitter performance across the entire operating range of 622 Mbps to

6.375 Gbps

● Provides best-in class signal integrity performance

● Offers enhanced transmit pre-emphasis technology, programmable receiver

equalization, and output voltage control

Innovative clock

management

system

● Clock signals are automatically routed to the appropriate destination

● Greatly simplifies high-speed board designs

● Internal clock frequency of up to 500 MHz

Based on the

1.2-V, 90-nm

SRAM process

● Provides up to 6.7 Mbits of on-chip TriMatrix

™

memory

● Provides up to 63 DSP blocks for efficient implementation of high-performance filters

and other DSP functions

● Supports a wide range of external memory interfaces

1 2 ... 11 12 13 14 15 16 17 18 19 20 21 ... 39 40

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