Altera Arria V GX FPGA Development Board Instrukcja Użytkownika Pobierz pdf (Strona 44)

2–34 Chapter 2: Board Components

General User Input/Output

Arria V GX FPGA Development Board November 2013 Altera Corporation

Reference Manual

Table 2–34 lists the LCD pin definitions, and is an excerpt from Lumex data sheet.

f For more information such as timing, character maps, interface guidelines, and other

related documentation, visit www.lumex.com.

Table 2–35 lists the LCD component references and the manufacturing information.

SDI Video Output/Input

The SDI video port consists of a LMH0303SQx cable driver and a LMH0384SQ cable

equalizer. The PHY devices from National Semiconductor interface to single-ended

75-Ω SMB connectors.

The cable driver supports operation at 270 Mbit standard definition (SD), 1.5 Gbit

high definition (HD), and 3.0 Gbit dual-link HD modes. Control signals are allowed

for SD and HD modes selections, as well as device enable. The device can be clocked

by the 148.5 MHz voltage-controlled crystal oscillator (VCXO) and matched to

incoming signals within 50 ppm using the UP and DN voltage control lines to the

VCXO.

Table 2–36 lists the supported output standards for the SD and HD input.

Table 2–34. LCD Pin Definitions and Functions

Number

Symbol

Level

Function

—

Power supply

5 V

—GND (0 V)

— For LCD drive

4RS H/L

H: Data input

L: Instruction input

5R/W H/L

H: Data read (module to MPU)

L: Data write (MPU to module)

6 E H, H to L Enable

7–14 DB0–DB7 H/L Data bus—software selectable 4-bit or 8-bit mode

Table 2–35. LCD Component References and Manufacturing Information

Board

Reference

Description Manufacturer

Manufacturer

Part Number

Manufacturer

Website

J30

2×7 pin, 100 mil, vertical header Samtec TSM-107-01-G-DV www.samtec.com

2×16 character display, 5×8 dot matrix Lumex Inc. LCM-S01602DSR/C www.lumex.com

Table 2–36. Supported Output Standards for SD and HD Input

SD_HD Input Supported Output Standards Rise TIme

0 SMPTE 424M, SMPTE 292M Faster

1 SMPTE 259M Slower

1 2 ... 39 40 41 42 43 44 45 46 47 48 49 ... 89 90

Komentarze do niniejszej Instrukcji

Brak uwag

Altera Arria V GX FPGA Development Board Instrukcja Użytkownika Strona 44

Komentarze do niniejszej Instrukcji

Powiązane produkty i podręczniki dla Urządzenia pomiarowe Altera Arria V GX FPGA Development Board