Altera LVDS SERDES Transmitter / Receiver Instrukcja Użytkownika Pobierz pdf (Strona 36)

Parameter Type Description

enable_dpa_fifo String Indicates whether the DPA FIFO buffer is

enabled for this channel.You must enable the

rx_dpa_locked port and enable_dpa_mode

parameter if this parameter is specified. The

values are ON and OFF. If omitted, the default

value is ON. This parameter is available for

Stratix GX devices in DPA mode only.

enable_dpa_initial_phase_

selection

String Specifies whether the dpa_initial_phase_

value parameter is enabled. The values are ON

and OFF. If omitted, the default value is OFF.

When set to OFF, the dpa_initial_phase_

value parameter value is set to 0.

enable_dpa_mode String Turns on DPA mode. The values are ON and

OFF. If omitted, the default value is OFF.

enable_dpa_pll_calibration String The values are ON and OFF. The default value is

OFF. Set this parameter to ON or OFF if you are

instantiating the ALTLVDS_RX IP core in DPA

mode with PLL calibration.

enable_soft_cdr_mode String Specifies whether the rx_divfwdclk port is

used. When set to ON, the rx_divfwdclk port is

driven by the DPA clock, and then it is divided

down by the deserialization factor. When set to

ON, the DPA FIFO is bypassed and rx_fifo_

reset and reset_fifo_on_first_lock are

ignored. The values are ON and OFF. If omitted,

the default is OFF.

implement_in_les String Specifies whether to implement SERDES

circuitry in logic cells, which allows the circuitry

to behave similar to Stratix LVDS circuitry. Use

the implement_in_les parameter for SERDES

functions that require data rates that are lower

than the dedicated circuitry. Values are ON and

OFF. Note that the receiver IP core starts

capturing the LVDS stream at the first rising

edge of the fast clock, after the PLL has locked.

This is intended for slow speeds and the bit

alignment may be different from a hard

SERDES implementation.

Command Line Interface Parameters

UG-MF9504

2014.12.15

Altera Corporation

LVDS SERDES Transmitter/Receiver IP Cores User Guide

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