Altera LVDS SERDES Transmitter / Receiver Instrukcja Użytkownika Pobierz pdf (Strona 55)

Where:

• RSKM—is the timing margin between the receiver's clock input and the data input SW.

• Time unit interval (TUI)—is the time period of the serial data (1/f

MAX

). Also known as the LVDS

period in the TimeQuest Timing Analyzer section in the Quartus II Compilation Report.

• SW—is the period of time that the input data must be stable to ensure that data is successfully sampled

by the LVDS receiver. The SW is a device property and varies with device speed grade.

• RCCS— is the timing difference between the fastest and slowest input transitions, including t

variations and clock skew. Specify RCCS by applying minimum and maximum set_input_delay

constraints to the receiver inputs, where RCCS is the difference between the maximum and minimum

value.

To obtain accurate RSKM results in the TimeQuest analyzer, specify your RCCS figure using

set_input_delay constraints.

The difference between your set_input_delay -min and set_input_delay -max must match your

RCCS figure.

For example, to specify an RCCS figure of 0.3 ns:

set_input_delay -clock rx_inclock -min 0 [get_ports {rx_in*}]

set_input_delay -clock rx_inclock -max 0.3 [get_ports {rx_in*}]

The TimeQuest analyzer takes the 0.3 ns RCCS figure into account during RSKM analysis.

The following figure shows the relationship between the RSKM, RCCS, and SW.

UG-MF9504

2014.12.15

Receiver Skew Margin and Transmitter Channel-to-Channel Skew

LVDS SERDES Transmitter/Receiver IP Cores User Guide

Altera Corporation

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Altera LVDS SERDES Transmitter / Receiver Instrukcja Użytkownika Strona 55