Altera Interlaken MegaCore Function Instrukcja Użytkownika Pobierz pdf (Strona 28)

4–2 Chapter 4: Functional Description

Architecture Overview

Interlaken MegaCore Function June 2012 Altera Corporation

User Guide

Architecture Overview

Figure 4–1 shows the main blocks of the Interlaken MegaCore function.

The following sections describe the individual interfaces, clocks, and blocks.

Interfaces Overview

The Altera Interlaken MegaCore function supports the following interfaces:

■ Interlaken Interface

■ Application Interface

■ Out-of-Band Flow Control Interface

Interlaken Interface

The Interlaken interface complies with the Interlaken Protocol Definition, Revision 1.2. It

provides a high-speed transceiver interface to an Interlaken link.

Figure 4–1. Interlaken MegaCore Function Block Diagram

HSIO Block

Interlaken MegaCore Function

Application

Interface

FIFO and Pipeline Registers (10- and 20-lane variations only)

Transceiver Blocks

PCS

MAC

PCS

MAC

TX Out-of-Band

Flow Control

RX Out-of-Band

Flow Control

Calendar

and

Status

Filter

and

Buffer

Filter

and

Buffer

Packet

Regroup

Packet

Regroup

Arbiter

Channel 0

Channel 1

Channel 0

Channel 1

Calendar and

lane, link status

Out-of-Band Flow Control Block

Interlaken

Interface

Out-of-Band

Flow Control

Interface

1 2 ... 23 24 25 26 27 28 29 30 31 32 33 ... 89 90

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