Altera 100G Development Kit, Stratix IV GT Edition Instrukcja Użytkownika Pobierz pdf (Strona 39)

Chapter 2: Board Components 2–31

General User Input/Output

September 2010 Altera Corporation 100G Development Kit, Stratix IV GT Edition Reference Manual

Table 2–23 lists the component references and the manufacturing information.

User DIP Switches

Board references SW3 and SW4 are an 8-pin DIP switch with numbering marked on it

to indicate the switch number. When the switch is in the ON position, a logic 1 is

selected. When the switch is in the OFF position, a logic 0 is selected. The switches are

user-defined, and are provided for additional FPGA input control. There is no

board-specific function for these switches.

Table 2–19 lists the user-defined DIP switch schematic signal names and their

corresponding Stratix IV GT pin numbers.

D31

General purpose green

surface mount (type 1206)

User LEDs.

FPGA_USER_LED4

2.5-V CMOS

J6 —

D32

FPGA_USER_LED3

H6 —

D33

FPGA_USER_LED2

R13 —

D34

FPGA_USER_LED1

N12 —

D35

FPGA_USER_LED0

G6 —

Table 2–17. User-Defined LED Schematic Signal Names and Functions

Board

Reference

Description

Schematic

Signal Name

I/O Standard

Stratix IV GT

Device

Pin Number

Other

Connections

Table 2–18. Component Reference Input and Ouput Devices

Board Reference

Device

Description

Manufacturer

Part Number

Manufacturer

Website

D21–D24,

D28–D35

Green LEDs Lumex Inc. SML-LX1206GC-TR www.lumex.com

Table 2–19. User-Defined DIP Switch Schematic Signal Names and Functions

Board

Reference

Description

Schematic

Signal Name

I/O Standard

Stratix IV GT

Device

Pin Number

Other

Connections

SW3.1

User-Defined DIP switch

connected to FPGA device.

USER_DIPSW0

2.5-V CMOS

— U72.R6

SW3.2

USER_DIPSW1

— U72.U4

SW3.3

USER_DIPSW2

— U72.T6

SW3.4

USER_DIPSW3

— U72.V4

SW3.5

USER_DIPSW4

— U72.N7

SW3.6

USER_DIPSW5

— U72.T5

SW3.7

USER_DIPSW6

— U72.P7

SW3.8

USER_DIPSW7

— U72.U5

SW4.1

FPGA_USER_DIPSW0

AD15 —

SW4.2

FPGA_USER_DIPSW1

AC15 —

SW4.3

FPGA_USER_DIPSW2

T15 —

SW4.4

FPGA_USER_DIPSW3

G8 —

SW4.5

FPGA_USER_DIPSW4

F9 —

SW4.6

FPGA_USER_DIPSW5

P13 —

1 2 ... 34 35 36 37 38 39 40 41 42 43 44 ... 79 80

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