
Chapter 2: Board Components 2–57
Components and Interfaces
September 2010 Altera Corporation 100G Development Kit, Stratix IV GT Edition Reference Manual
U47.R4 Address bus
QDR2A_A14
U44.AF13 —
U47.R5 Address bus
QDR2A_A15
U44.AM7 —
U47.R7 Address bus
QDR2A_A16
U44.AV20 —
U47.A9 Address bus
QDR2A_A17
U44.AT14 —
U47.A3 Address bus
QDR2A_A18
U44.AL8 —
U47.A10 Address bus
QDR2A_A19
U44.AT16 —
U47.C6 Address bus
QDR2A_A20
U44.AE16 —
U47.B7 Byte write select
QDR2A_BWSN0
U44.BA10 —
U47.A5 Byte write select
QDR2A_BWSN1
U44.BB10 —
U47.A1 QDR II echo clock
QDR2A_CQ_N
U44.AT12 —
U47.A11 QDR II echo clock
QDR2A_CQ_P
U44.AM14 —
U47.P10 Write data bus
QDR2A_D0
U44.BD11 —
U47.N11 Write data bus
QDR2A_D1
U44.BB12 —
U47.M11 Write data bus
QDR2A_D2
U44.AY14 —
U47.K10 Write data bus
QDR2A_D3
U44.BB14 —
U47.J11 Write data bus
QDR2A_D4
U44.BA14 —
U47.G11 Write data bus
QDR2A_D5
U44.BD13 —
U47.E10 Write data bus
QDR2A_D6
U44.BD12 —
U47.D11 Write data bus
QDR2A_D7
U44.BC13 —
U47.C11 Write data bus
QDR2A_D8
U44.BB13 —
U47.B3 Write data bus
QDR2A_D9
U44.AY13 —
U47.C3 Write data bus
QDR2A_D10
U44.BA11 —
U47.D2 Write data bus
QDR2A_D11
U44.AW14 —
U47.F3 Write data bus
QDR2A_D12
U44.BD10 —
U47.G2 Write data bus
QDR2A_D13
U44.BA12 —
U47.J3 Write data bus
QDR2A_D14
U44.BA13 —
U47.L3 Write data bus
QDR2A_D15
U44.AV14 —
U47.M3 Write data bus
QDR2A_D16
U44.AV12 —
U47.N2 Write data bus
QDR2A_D17
U44.AV13 —
U47.A6 QDR II clock input
QDR2A_K_N
U44.AY11 —
U47.B6 QDR II clock input
QDR2A_K_P
U44.AW12 —
U47.P11 Read data bus
QDR2A_Q0
U44.AV15 —
U47.M10 Read data bus
QDR2A_Q1
U44.AU14 —
U47.L11 Read data bus
QDR2A_Q2
U44.AU13 —
U47.K11 Read data bus
QDR2A_Q3
U44.AT13 —
U47.J10 Read data bus
QDR2A_Q4
U44.AR15 —
U47.F11 Read data bus
QDR2A_Q5
U44.AR14 —
U47.E11 Read data bus
QDR2A_Q6
U44.AR13 —
Table 2–39. QDR II Interface Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 8)
Board
Reference
Description
Schematic
Signal Name
Stratix IV GT
Device
Pin Name
Other
Connections
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