Altera Arria II GX FPGA Development Board Instrukcja Użytkownika Pobierz pdf (Strona 6)

1–2 Chapter 1: Overview

Board Component Blocks

Arria II GX FPGA Development Board Reference Manual February 2011 Altera Corporation

Board Component Blocks

The board features the following major component blocks:

■ Arria II GX EP2AGX125EF35 FPGA in the 1152-pin FineLine BGA (FBGA) package

■ 124,100 LEs

■ 49,640 adaptive logic modules (ALMs)

■ 8,121 Kbit on-die memory

■ 12 high-speed transceivers

■ 6 phase locked loops (PLLs)

■ 576 18x18 multipliers

■ 0.9-V core power

■ MAX

II EPM2210F256 CPLD in the 256-pin FBGA package

■ 2.5-V core power

■ FPGA configuration circuitry

■ MAX

II CPLD EPM2210 System Controller and flash fast passive parallel (FPP)

configuration

■ On-board USB-Blaster

for use with the Quartus

II Programmer

■ On-Board ports

■ Two HSMC expansion ports (HSMC port B is only populated when a

EP2AGX260 FPGA device is installed)

■ One gigabit Ethernet port

■ On-Board memory

■ 128-Mbyte 16-bit DDR3 memory

■ 1-Gbyte 64-bit DDR2 small outline DIMM (SODIMM)

■ 2-Mbyte Synchronous Static Random Access Memory (SSRAM)

■ 64-Mbyte flash memory

■ On-Board clocking circuitry

■ Five on-board oscillator

■ 50-MHz oscillator

■ 100-MHz oscillator

■ 155.52-MHz oscillator

■ Programmable oscillator with a default frequency of 125-MHz

■ Programmable oscillator with a default frequency of 100-MHz

■ SMA connectors for external LVPECL clock input

■ SMA connector for clock output

1 2 3 4 5 6 7 8 9 10 11 ... 63 64

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Altera Arria II GX FPGA Development Board Instrukcja Użytkownika Strona 6