Altera Floating-Point Instrukcja Użytkownika Strona 132
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Oceniono. / 5. Na podstawie oceny klientów
Family Function Precision Latency f
MAX
ALMs M10K
M20
K
DSP
Blocks
Logic Registers
Primary Secondary
Cyclone V
(5CGXFC7D
6F31C7)
Abs
Single 0 -- 33 0 -- 0 0 0
Double 0 -- 65 0 -- 0 0 0
Add
Single 12 225.94 403 0 -- 0 562 35
Double 20 208.99 932 0 -- 0 1,813 72
AddSubtra
ct
Single 12 224.67 509 0 -- 0 805 65
Double 20 211.55 1,197 0 -- 0 2,647 120
Cube Root
Single 10 230.47 131 6 -- 2 213 11
Double 34 212.49 890 17 -- 10 1,991 54
Divide
Single 20 232.61 466 5 -- 4 991 62
Double 51 201.01 1,782 41 -- 15 4,317 165
Cyclone V
(5CGXFC7D
6F31C7)
Exp base
10
Single 20 217.58 552 3 -- 2 905 32
Double 52 212.77 2,317 0 -- 10 4,287 122
Exp base 2
Single 9 211.33 352 0 -- 2 314 13
Double 36 219.3 1,128 0 -- 10 2,364 87
Exp base e
Single 17 207.68 698 0 -- 2 860 31
Double 50 198.85 2,309 0 -- 10 4,300 126
Reciprocal
Single 14 230.95 245 4 -- 3 378 26
Double 44 207.43 1,201 9 -- 14 2,694 94
Reciprocal
Square
Root
Single 9 233.37 137 4 -- 2 223 25
Double 30 250 782 13 -- 9 1,932 46
Cyclone V
(5CGXFC7D
6F31C7)
LDExp
Single 2 346.02 69 0 -- 0 87 1
Double 3 357.91 104 0 -- 0 215 0
Log base
10
Single 22 203.33 486 4 -- 3 1,066 47
Double 49 196.97 1,888 40 -- 11 4,483 153
Log(1+x)
Single 29 191.5 944 4 -- 3 1,844 105
Double 62 168.27 3,012 40 -- 14 6,899 210
Log base 2
Single 20 202.1 413 4 -- 3 918 50
Double 54 194.21 1,898 13 -- 17 4,732 151
UG-01058
2014.12.19
ALTERA_FP_FUNCTIONS Resource Utilization and Performance
18-5
ALTERA_FP_FUNCTIONS IP Core
Altera Corporation
Send Feedback
- 101 Innovation Drive 1
- San Jose, CA 95134 1
- Contents 2
- About Floating-Point IP Cores 7
- Design Flow 8
- Using the Parameter Editor 10
- File Name Description 12
- Upgrading IP Cores 15
- Related Information 18
- Floating-Point Formats 19
- Special Case Numbers 20
- Non-IEEE-754 Standard Format 21
- Integer bits 22
- Fraction bits 22
- VHDL Component Declaration 24
- VHDL LIBRARY-USE Declaration 24
- ALTERA_FP_MATRIX_INV IP Core 25
- Triangular Matrix Inversion 29
- Matrix Multiplication 29
- Matrix Inversion Operation 29
- Precision Format Numbers 30
- Sample Matrix Data 32
- Matrix Data 33
- ALTERA_FP_MATRIX_INV Signals 34
- ALTERA_FP_MATRIX_MULT IP Core 36
- . . . N-10 . . 38
- . . . N-10 38
- ALTERA_FP_MATRIX_MULT 39
- Parameter Value Description 40
- ALTERA_FP_ACC_CUSTOM IP Core 42
- ALTERA_FP_ACC_CUSTOM Signals 44
- ALTFP_ADD_SUB IP Core 48
- ALTFP_ADD_SUB Signals 51
- ALTFP_ADD_SUB 52
- ALTFP_ADD_SUB Parameters 53
- ALTFP_DIV IP Core 55
- ALTFP_DIV Truth Table 56
- ALTFP_DIV Signals 60
- ALTFP_DIV Parameters 61
- ALTFP_MULT IP Core 63
- Parameters 66
- ALTFP_MULT Signals 67
- ALTFP_SQRT 69
- ALTFP_SQRT Truth Table 70
- ALTFP_SQRT Signals 72
- ALTFP_SQRT Parameters 74
- ALTFP_EXP IP Core 75
- ALTFP_EXP Signals 78
- ALTFP_EXP 79
- ALTFP_EXP Parameters 80
- ALTFP_INV IP Core 81
- ALTFP_INV_SQRT IP Core 87
- ALTFP_INV_SQRT 90
- ALTFP_LOG 93
- ALTFP_ATAN IP Core 99
- ALTFP_ATAN Parameters 100
- Parameter 101
- Type Required Description 101
- ALTFP_SINCOS IP Core 102
- ALTFP_SINCOS Signals 103
- ALTFP_SINCOS Parameters 104
- ALTFP_ABS IP Core 105
- UG-01058 106
- 2014.12.19 106
- ALTFP_ABS Signals 107
- ALTFP_ABS 108
- ALTFP_ABS Parameters 109
- ALTFP_COMPARE IP Core 111
- Format Numbers 112
- ALTFP_COMPARE Signals 113
- ALTFP_COMPARE Parameters 114
- ALTFP_CONVERT IP Core 116
- ALTFP_CONVERT Output Latency 117
- Point Format Numbers 121
- Time Event 122
- ALTFP_CONVERT Signals 123
- ALTFP_CONVERT Parameters 125
- ALTERA_FP_FUNCTIONS IP Core 128
- Function Description 129
- ALTERA_FP_FUNCTIONS Signals 151
- Altera Corporation 152
- Send Feedback 152
- Document Revision History 156
- Date Document 157
- Changes Made 157
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