Altera Floating-Point Instrukcja Użytkownika Strona 52
- Strona / 157
- Spis treści
- BOOKMARKI
Oceniono. / 5. Na podstawie oceny klientów
Figure 5-2: ALTFP_ADD_SUB
dataa[]
datab[]
add_sub
clock
clk_en
inst
ALTFP_ADD_SUB
result[]
overflow
nan
underflow
zero
aclr
Table 5-4: ALTFP_ADD_SUB Input Ports
Port Name Required Description
aclr No Asynchronous clear input for floating-point adder or subtractor. The
source is asynchronously reset when the aclr signal is asserted high.
add_sub No Optional input port to enable dynamic switching between the adder
and subtractor functions. The add_sub port must be used when the
DIRECTION parameter is set to VARIABLE. When the add_sub port is
high, result[] = dataa[] + datab[], otherwise, result[] =
dataa[] - datab[].
clk_en No Clock enable to the floating-point adder or subtractor. This port allows
addition or subtraction to occur when asserted high. When asserted
low, no operations occur and the outputs are unchanged.
clock Yes Clock input to the IP core.
dataa[] Yes Data input to the floating-point adder or subtractor. The MSB is the
sign bit, the next MSBs are the exponent, and the LSBs are the
mantissa bits. The size of this port is the total width of the sign bit, the
exponent bits, and the mantissa bits.
datab[] Yes Data input to the floating-point adder or subtractor. This port is
configured in the same way as dataa[].
Table 5-5: ALTFP_ADD_SUB Output Ports
Port Name Required Description
nan Yes NaN exception output. Asserted when an illegal addition or subtraction
occurs, such as infinity minus infinity. When an invalid addition or
subtraction occurs, a NaN value is output to the result[] port. Any
adding or subtracting involving NaN values also produces a NaN value.
UG-01058
2014.12.19
ALTFP_ADD_SUB Signals
5-5
ALTFP_ADD_SUB IP Core
Altera Corporation
Send Feedback
- 101 Innovation Drive 1
- San Jose, CA 95134 1
- Contents 2
- About Floating-Point IP Cores 7
- Design Flow 8
- Using the Parameter Editor 10
- File Name Description 12
- Upgrading IP Cores 15
- Related Information 18
- Floating-Point Formats 19
- Special Case Numbers 20
- Non-IEEE-754 Standard Format 21
- Integer bits 22
- Fraction bits 22
- VHDL Component Declaration 24
- VHDL LIBRARY-USE Declaration 24
- ALTERA_FP_MATRIX_INV IP Core 25
- Triangular Matrix Inversion 29
- Matrix Multiplication 29
- Matrix Inversion Operation 29
- Precision Format Numbers 30
- Sample Matrix Data 32
- Matrix Data 33
- ALTERA_FP_MATRIX_INV Signals 34
- ALTERA_FP_MATRIX_MULT IP Core 36
- . . . N-10 . . 38
- . . . N-10 38
- ALTERA_FP_MATRIX_MULT 39
- Parameter Value Description 40
- ALTERA_FP_ACC_CUSTOM IP Core 42
- ALTERA_FP_ACC_CUSTOM Signals 44
- ALTFP_ADD_SUB IP Core 48
- ALTFP_ADD_SUB Signals 51
- ALTFP_ADD_SUB 52
- ALTFP_ADD_SUB Parameters 53
- ALTFP_DIV IP Core 55
- ALTFP_DIV Truth Table 56
- ALTFP_DIV Signals 60
- ALTFP_DIV Parameters 61
- ALTFP_MULT IP Core 63
- Parameters 66
- ALTFP_MULT Signals 67
- ALTFP_SQRT 69
- ALTFP_SQRT Truth Table 70
- ALTFP_SQRT Signals 72
- ALTFP_SQRT Parameters 74
- ALTFP_EXP IP Core 75
- ALTFP_EXP Signals 78
- ALTFP_EXP 79
- ALTFP_EXP Parameters 80
- ALTFP_INV IP Core 81
- ALTFP_INV_SQRT IP Core 87
- ALTFP_INV_SQRT 90
- ALTFP_LOG 93
- ALTFP_ATAN IP Core 99
- ALTFP_ATAN Parameters 100
- Parameter 101
- Type Required Description 101
- ALTFP_SINCOS IP Core 102
- ALTFP_SINCOS Signals 103
- ALTFP_SINCOS Parameters 104
- ALTFP_ABS IP Core 105
- UG-01058 106
- 2014.12.19 106
- ALTFP_ABS Signals 107
- ALTFP_ABS 108
- ALTFP_ABS Parameters 109
- ALTFP_COMPARE IP Core 111
- Format Numbers 112
- ALTFP_COMPARE Signals 113
- ALTFP_COMPARE Parameters 114
- ALTFP_CONVERT IP Core 116
- ALTFP_CONVERT Output Latency 117
- Point Format Numbers 121
- Time Event 122
- ALTFP_CONVERT Signals 123
- ALTFP_CONVERT Parameters 125
- ALTERA_FP_FUNCTIONS IP Core 128
- Function Description 129
- ALTERA_FP_FUNCTIONS Signals 151
- Altera Corporation 152
- Send Feedback 152
- Document Revision History 156
- Date Document 157
- Changes Made 157
Powiązane produkty i podręczniki dla Urządzenia pomiarowe Altera Floating-Point
Urządzenia pomiarowe Altera Nios II Embedded Evaluation Kit Cyclone III Editio Instrukcja Użytkownika
(80 strony)
(80 strony)
Urządzenia pomiarowe Altera Phase-Locked Loop Reconfiguration IP Core Instrukcja Użytkownika
(51 strony)
(51 strony)
Urządzenia pomiarowe Altera Serial Digital Interface (SDI) MegaCore Function Instrukcja Użytkownika
(140 strony)
(140 strony)
© 2020, manymanuals.pl. Wszelkie prawa zastrzeżone. | 0.066 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Komentarze do niniejszej Instrukcji