Altera Stratix IV E FPGA Development Board Instrukcja Użytkownika Pobierz pdf (Strona 45)

Chapter 2: Board Components 2–37

Components and Interfaces

May 2011 Altera Corporation Stratix IV E FPGA Development Board Reference Manual

J19.98

LVDS or CMOS clock in 1 or

CMOS bit 39

HSMA_CLK_IN_N1

LVDS or 2.5-V

W1 —

J19.101 LVDS TX bit 8 or CMOS bit 40

HSMA_TX_D_P8

AC6 —

J19.102 LVDS RX bit 8 or CMOS bit 41

HSMA_RX_D_P8

AF2 —

J19.103 LVDS TX bit 8n or CMOS bit 42

HSMA_TX_D_N8

AC5 —

J19.104 LVDS RX bit 8n or CMOS bit 43

HSMA_RX_D_N8

AF1 —

J19.107 LVDS TX bit 9 or CMOS bit 44

HSMA_TX_D_P9

AB6 —

J19.108 LVDS RX bit 9 or CMOS bit 45

HSMA_RX_D_P9

AE2 —

J19.109 LVDS TX bit 9n or CMOS bit 46

HSMA_TX_D_N9

AB5 —

J19.110 LVDS RX bit 9n or CMOS bit 47

HSMA_RX_D_N9

AE1 —

J19.113 LVDS TX bit 10 or CMOS bit 48

HSMA_TX_D_P10

AB8 —

J19.114 LVDS RX bit 10 or CMOS bit 49

HSMA_RX_D_P10

AE4 —

J19.115 LVDS TX bit 10n or CMOS bit 50

HSMA_TX_D_N10

AC7 —

J19.116 LVDS RX bit 10n or CMOS bit 51

HSMA_RX_D_N10

AE3 —

J19.119 LVDS TX bit 11 or CMOS bit 52

HSMA_TX_D_P11

Y6 —

J19.120 LVDS RX bit 11 or CMOS bit 53

HSMA_RX_D_P11

AC2 —

J19.121 LVDS TX bit 11n or CMOS bit 54

HSMA_TX_D_N11

Y5 —

J19.122 LVDS RX bit 11n or CMOS bit 55

HSMA_RX_D_N11

AD1 —

J19.125 LVDS TX bit 12 or CMOS bit 56

HSMA_TX_D_P12

AA7 —

J19.126 LVDS RX bit 12 or CMOS bit 57

HSMA_RX_D_P12

AB2 —

J19.127 LVDS TX bit 12n or CMOS bit 58

HSMA_TX_D_N12

AA6 —

J19.128 LVDS RX bit 12n or CMOS bit 59

HSMA_RX_D_N12

AC1 —

J19.131 LVDS TX bit 13 or CMOS bit 60

HSMA_TX_D_P13

Y8 —

J19.132 LVDS RX bit 13 or CMOS bit 61

HSMA_RX_D_P13

AA1 —

J19.133 LVDS TX bit 13n or CMOS bit 62

HSMA_TX_D_N13

Y7 —

J19.134 LVDS RX bit 13n or CMOS bit 63

HSMA_RX_D_N13

AB1 —

J19.137 LVDS TX bit 14 or CMOS bit 64

HSMA_TX_D_P14

Y10 —

J19.138 LVDS RX bit 14 or CMOS bit 65

HSMA_RX_D_P14

AC4 —

J19.139 LVDS TX bit 14n or CMOS bit 66

HSMA_TX_D_N14

Y9 —

J19.140 LVDS RX bit 14n or CMOS bit 67

HSMA_RX_D_N14

AB3 —

J19.143 LVDS TX bit 15 or CMOS bit 68

HSMA_TX_D_P15

W12 —

J19.144 LVDS RX bit 15 or CMOS bit 69

HSMA_RX_D_P15

AB4 —

J19.145 LVDS TX bit 15n or CMOS bit 70

HSMA_TX_D_N15

Y11 —

J19.146 LVDS RX bit 15n or CMOS bit 71

HSMA_RX_D_N15

AA3 —

J19.149 LVDS TX bit 16 or CMOS bit 72

HSMA_TX_D_P16

AA12 —

J19.150 LVDS RX bit 16 or CMOS bit 73

HSMA_RX_D_P16

AA4 —

J19.151 LVDS TX bit 16n or CMOS bit 74

HSMA_TX_D_N16

AB11 —

J19.152 LVDS RX bit 16n or CMOS bit 75

HSMA_RX_D_N16

Y3 —

Table 2–40. HSMC Port A Pin Assignments, Schematic Signal Names, and Functions (Part 4 of 5)

Board

Reference

Description

Schematic Signal

Name

I/O Standard

Stratix IV E

Device

Pin Number

Other

Connections

1 2 ... 40 41 42 43 44 45 46 47 48 49 50 ... 71 72

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Altera Stratix IV E FPGA Development Board Instrukcja Użytkownika Strona 45

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