Altera SDI II MegaCore Instrukcja Użytkownika Pobierz pdf (Strona 74)

Table 4-6: Receiver Protocol Signals

Note: S = Indicates the number of streams; 4 for multi standard (up to 12G) mode and 1 for other modes.

Signal Width Direction Description

rx_std

3 Output Receiver video standard. Applicable for 3G-SDI, and multi

standard modes.

• SD-SDI = 000

• HD-SDI = 001

• 3G-SDI Level B = 010

• 3G-SDI Level A = 011

• 6G-SDI Level B = 100

• 6G-SDI Level A = 101

• 12G-SDI Level B = 110

• 12G-SDI Level A = 111

rx_std_in

3 Input Indicates the received video standard. Applicable for 3G-SDI,

dual standard, and triple standard modes only.

rx_clkin

1 Input Receiver protocol clock input. This signal must be driven by the

rx_clkout clock signal from the transceiver block.

Note: Not applicable for Arria 10 devices.

rx_rst_proto_in

1 Input Receiver protocol reset signal. This signal must be driven by the

rx_rst_proto_out reset signal from the transceiver block.

Note: Not applicable for Arria 10 devices.

rx_clkin_b

1 Input Receiver protocol clock input for link B. This signal must be

driven by the rx_clkout_b clock signal from the transceiver

block. For HD-SDI dual link configuration only.

Note: Not applicable for Arria 10 devices.

rx_rst_proto_in_

1 Input Receiver protocol reset signal for link B. This signal must be

driven by the rx_rst_proto_out_b reset signal from the

transceiver block. For HD-SDI dual link receiver protocol

configuration only.

Note: Not applicable for Arria 10 devices.

rx_dataout

20 Output Receiver parallel data out.

4-32

SDI II IP Core Signals

UG-01125

2015.05.04

Altera Corporation

SDI II IP Core Functional Description

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