Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Instrukcja Użytkownika Pobierz pdf (Strona 105)

Signal Name Direction Interface

tx_inc_mcast_data_err

Output

tx_inc_mcast_data_ok

Output

tx_inc_bcast_data_err

Output

tx_inc_bcast_data_ok

Output

tx_inc_ucast_data_err

Output

tx_inc_ucast_data_ok

Output

tx_inc_mcast_ctrl

Output

tx_inc_bcast_ctrl

Output

tx_inc_ucast_ctrl

Output

tx_inc_pause

Output

tx_inc_fcs_err

Output

tx_inc_fragment

Output

tx_inc_jabber

Output

tx_inc_sizeok_fcserr

Output

rx_inc_runt

Output

RX statistics counter increment

vectors

These signals are available

whether or not your IP core

includes RX statistics counters.

rx_inc_64

Output

rx_inc_127

Output

rx_inc_255

Output

rx_inc_511

Output

rx_inc_1023

Output

rx_inc_1518

Output

rx_inc_max

Output

rx_inc_over

Output

rx_inc_mcast_data_err

Output

3-60

Low Latency 40-100GbE IP Core Signals

UG-01172

2015.05.04

Altera Corporation

Functional Description

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Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Instrukcja Użytkownika Strona 105

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