Altera Avalon Verification IP Suite Instrukcja Użytkownika Pobierz pdf (Strona 158)

event_reset_asserted

event_reset_assertedPrototype:

Verilog HDL: N.A.

VHDL: None

Arguments:

voidReturns:

Notifies the testbench that reset has been asserted.Description:

VHDLLanguage support:

get_<role name>()

int <role name port width> get_<role name>()Prototype:

Verilog HDL: None

VHDL: value

Arguments:

valueReturns:

Returns interface signal value from the input/bidirectional port.Description:

Verilog HDL, VHDLLanguage support:

get_version()

string get_version()Prototype:

Verilog HDL: None

VHDL: N.A.

Arguments:

stringReturns:

Returns BFM version as a string of three integers separated by periods. For example,

version 13.1 sp1 is encoded as "13.1.1".

Description:

Verilog HDLLanguage support:

Altera Corporation

Conduit BFM

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event_reset_asserted

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Altera Avalon Verification IP Suite Instrukcja Użytkownika Strona 158