Altera Avalon Verification IP Suite Instrukcja Użytkownika Strona 79

  • Pobierz
  • Dodaj do moich podręczników
  • Drukuj
  • Strona
    / 224
  • Spis treści
  • BOOKMARKI
  • Oceniono. / 5. Na podstawie oceny klientów
Przeglądanie stron 78
set_enable_a_burst_legal()
set_enable_a_burst_legal()Prototype:
Verilog HDL: Boolean
VHDL: N.A.
Arguments:
voidReturns:
Enables an assertion that ensures that the total number of assertions for the
write and readdatavalid is the same as the burstcount for any burst
transfer. Disabled when burst transfers are not supported.
Description:
Verilog HDLLanguage support:
set_enable_a_byteenable_legal()
set_enable_a_byteenable_legal()Prototype:
Verilog HDL: Boolean
VHDL: N.A.
Arguments:
voidReturns:
Enables an assertion that ensures the byteenable value is legal value.
Disabled when byteenable is not supported.
For more information about legal byte enables, refer to the Avalon Interface
Specifications.
Description:
Verilog HDLLanguage support:
Related Information
Avalon Interface Specifications
set_enable_a_constant_during_burst()
set_enable_a_constant_during_burst()Prototype:
Verilog HDL: Boolean
VHDL: N.A.
Arguments:
voidReturns:
Enables an assertion ensuring address, burstcount, and byteenable are
held constant in a write burst transfer. Disabled when waitrequest is not
supported. Disabled when burst transfers are not supported.
Description:
Verilog HDLLanguage support:
Altera Corporation
Avalon-MM Monitor
Send Feedback
7-7
set_enable_a_burst_legal()
Przeglądanie stron 78
1 2 ... 74 75 76 77 78 79 80 81 82 83 84 ... 223 224

Komentarze do niniejszej Instrukcji

Brak uwag