Altera Avalon Verification IP Suite Instrukcja Użytkownika Strona 180

  • Pobierz
  • Dodaj do moich podręczników
  • Drukuj
  • Strona
    / 224
  • Spis treści
  • BOOKMARKI
  • Oceniono. / 5. Na podstawie oceny klientów
Przeglądanie stron 179
event_max_result_queue_size()
event_max_result_queue_size()Prototype:
Verilog HDL: N.A.
VHDL: bfm_id
Arguments:
voidReturns:
Indicates that the received result exceeds the maximum level.Description:
VHDLLanguage support:
event_min_result_queue_size()
event_min_result_queue_size()Prototype:
Verilog HDL: N.A.
VHDL: bfm_id
Arguments:
voidReturns:
Indicates that the received result is below the minimum level.Description:
VHDLLanguage support:
get_instruction_queue_size()
int get_instruction_queue_size(int size)Prototype:
Verilog HDL: None
VHDL: instruction_queue_size, bfm_id, req_if(bfm_id)
Arguments:
int size.Returns:
Returns the number of instructions in the queue.Description:
Verilog HDL, VHDLLanguage support:
Altera Corporation
Nios II Custom Instruction Master BFM
Send Feedback
14-5
event_max_result_queue_size()
Przeglądanie stron 179
1 2 ... 175 176 177 178 179 180 181 182 183 184 185 ... 223 224

Komentarze do niniejszej Instrukcji

Brak uwag